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公开(公告)号：US20220382115A1
公开(公告)日：2022-12-01
申请号：US17773412
申请日：2021-07-07
发明人： Yuntian ZHANG , Maoxiu ZHOU , Haipeng YANG , Ke DAI , Mengmeng LI , Yanping LIAO , Lei GUO
IPC分类号： G02F1/1362 , G02F1/1343 , G02F1/1368
摘要： An Embodiment of the present disclosure provide a display substrate, including a base substrate, and a plurality of first scanning lines, a plurality of second scanning lines, a plurality of data lines, a plurality of common electrodes and a plurality of pixel electrodes on the base substrate. The second scanning lines are parallel to the data lines, and the second scanning lines, the common electrodes and the pixel electrodes are in different layers. The common electrodes are located on a side of the second scanning lines and the data lines away from the base substrate, and on a side of the pixel electrodes proximal to the base substrate. An orthographic projection of one of the data line and the second scanning line on the base substrate is located in a spacer region between adjacent pixel electrodes.
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公开(公告)号：US20230038437A1
公开(公告)日：2023-02-09
申请号：US17758337
申请日：2021-08-04
发明人： Lin ZHANG , Yanping LIAO , Lei GUO , Ke DAI , Li TIAN
IPC分类号： G02F1/1335 , G02F1/1347
摘要： The present disclosure provides a display device. The display device includes: a liquid crystal display panel; a liquid crystal light control panel located on the light incident side of the liquid crystal display panel; and at least two haze layers located on the light emitting side of the liquid crystal display panel.
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3.发明申请公开(公告)号：US20220301491A1
公开(公告)日：2022-09-22
申请号：US17498411
申请日：2021-10-11
发明人： Tianxun XIU , Changcheng LIU , Yanping LIAO , Yinlong ZHANG , Ming DENG , Guohuo SU , Jiantao LIU
IPC分类号： G09G3/32
摘要： The disclosure discloses a timing controller board, a main control board, a display device and a detection method thereof. The timing controller board outputs a second level signal transmitted by a first fixed potential signal pin to the main control board through a detection circuit when a first data signal pin outputs a first level signal; the main control board loads a second potential signal transmitted by a second fixed potential signal pin to a second data signal pin and a clock signal pin through a switching circuit upon receiving the second level signal, to cause the main control board to stop sending a data signal to the timing controller board through the second data signal pin and stop sending a clock signal to the timing controller board through the clock signal pin.
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公开(公告)号：US20220004053A1
公开(公告)日：2022-01-06
申请号：US16959217
申请日：2019-08-29
发明人： Lin ZHANG , Hongliang WANG , Ke DAI , Lei GUO , Yanping LIAO
IPC分类号： G02F1/1335
摘要： According to a liquid crystal display panel and a display device in the present disclosure, since at least one of a first polarizer and a second polarizer has a light scattering structure, polarized light of corresponding colors transmitted by sub-pixel units with different colors in a liquid crystal display structure can be uniformly diffused by the light scattering structure. That is to say, the light scattering structure plays a role for uniformly mixing the polarized light of different colors. Therefore, the rainbow pattern phenomenon is effectively improved or even eliminated, and the display quality is improved.
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公开(公告)号：US20240321230A1
公开(公告)日：2024-09-26
申请号：US18578310
申请日：2022-07-27
发明人： Wenpeng MA , Yinlong ZHANG , Shulin YAO , Yingmeng MIAO , Pengfei HU , Yuhang TIAN , Zheng ZHANG , Yanping LIAO , Dongchuan CHEN , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/0286 , G09G2310/08 , G09G2340/0435
摘要： A display apparatus includes sub-pixels, at least one gate line group and a scan drive circuit. The gate line group includes a first gate line, a second gate line and a third gate line. The scan drive circuit outputs, in a frame scan cycle, a first scan signal to the first gate line, a second scan signal to the second gate line, and a third scan signal to the third gate line in sequence. Durations of effective scan periods of the scan signals are equal. A start moment of the effective scan period of the second scan signal is delayed by a first time length compared with that of the first scan signal. A start moment of the effective scan period of the third scan signal is delayed by a second time length less than the first time length compared with that of the second scan signal.
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公开(公告)号：US20240296809A1
公开(公告)日：2024-09-05
申请号：US18044428
申请日：2022-03-22
发明人： Tao YANG , Yingmeng MIAO , Dongchuan CHEN , Yanping LIAO , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/0286 , G09G2310/08 , G09G2330/021
摘要： A driving method for a display panel and a display apparatus. The driving method includes: obtaining original display data of a current display frame; and when it is determined to adopt a first driving mode, loading first gate scanning signals (GA1_1-GA12_1) to gate lines (GA, GA1-GA12) in the display panel, and loading a data voltage to data lines (DA, DA1-DA7) in the display panel according to target display data obtained by removing a part of data from the original display data, so as to charge each sub-pixel in the display panel with the data voltage.
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公开(公告)号：US20240257778A1
公开(公告)日：2024-08-01
申请号：US18635531
申请日：2024-04-15
发明人： Dongchuan CHEN , Yanping LIAO , Yingmeng MIAO , Yinlong ZHANG , Shulin YAO , Xibin SHAO , Seungmin LEE , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G2310/0205 , G09G2310/0213 , G09G2310/0251 , G09G2310/08 , G09G2320/0257 , G09G2340/0435
摘要： A display driving method, a display driving device and a display device are provided. The display driving method includes: when displaying an odd-numbered frame, providing first parity row data of the odd-numbered frame to a display array, to enable a third parity row of the display array to be displayed based on real data of the first parity row data and enable a fourth parity row of the display array to be displayed based on interpolation data of the first parity row data; and when displaying an even-numbered frame, providing second parity row data of the even-numbered frame to the display array, to enable the fourth parity row of the display array to be displayed based on real data of the second parity row data and enable the third parity row of the display array to be displayed based on interpolation data of the second parity row data.
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公开(公告)号：US20240047469A1
公开(公告)日：2024-02-08
申请号：US17639305
申请日：2021-04-19
发明人： Cong WANG , Yingmeng MIAO , Dongchuan CHEN , Yanping LIAO , Seungmin LEE , Xibin SHAO , Jiantao LIU
IPC分类号： H01L27/12
CPC分类号： H01L27/124
摘要： The embodiments of the present disclosure provide a display panel and a display device. The display panel includes: a display area and a bezel area located at the periphery of the display area; a plurality of gate lines extending from the display area to the bezel area; a plurality of shift registers located in the bezel area on at least one side of the display panel and connected to the plurality of gate lines in one-to-one correspondence. The plurality of shift registers on the bezel area on any one side of the display panel are divided into at least two groups sequentially arranged along a first direction away from the display area; the shift registers in each group are sequentially arranged along a second direction; and an angle between the second direction and the first direction is greater than 0°.
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公开(公告)号：US20230377506A1
公开(公告)日：2023-11-23
申请号：US17634733
申请日：2021-03-29
发明人： Qiujie SU , Yingmeng MIAO , Dongchuan CHEN , Yanping LIAO , Seungmin LEE , Xibin SHAO , Xiaofeng YIN
CPC分类号： G09G3/2096 , G06F3/0412 , G06F3/0416 , G09G2310/0267 , G09G2310/0275
摘要： A display module and a display apparatus, relate to the technical filed of display. At least one chip group and a group of first PLG wirings corresponding to each of the chip groups are disposed in a first bonding area, each of the chip groups includes at least two groups of chip units, each group of the chip units includes at least one gate drive chip, each group of the first PLG wirings includes a first wiring and at least one second wiring; power pins of any two adjacent gate drive chips are connected by the first wiring, each of the second wirings surrounds and passes through each of the gate drive chips, the first wirings connected with the power pin of the last gate drive chip in the previous group of the chip units and any of the second wirings, are parallelly connected with the power pin of the first gate drive chip in the next group of the chip units, to reduce the luminance difference of pixels driven by the gate drive chips in each group of the chip units.
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公开(公告)号：US20230360615A1
公开(公告)日：2023-11-09
申请号：US17633008
申请日：2021-04-09
发明人： Dongchuan CHEN , Yanping LIAO , Yingmeng MIAO , Yinlong ZHANG , Shulin YAO , Xibin SHAO , Seungmin LEE , Jiantao LIU
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G2310/08 , G09G2310/0213 , G09G2310/0251 , G09G2310/0205 , G09G2320/0257 , G09G2340/0435
摘要： A display driving method, a display driving device and a display device are provided. The display driving method includes: when displaying an odd-numbered frame, providing first parity row data of the odd-numbered frame to a display array, to enable a third parity row of the display array to be displayed based on real data of the first parity row data and enable a fourth parity row of the display array to be displayed based on interpolation data of the first parity row data; and when displaying an even-numbered frame, providing second parity row data of the even-numbered frame to the display array, to enable the fourth parity row of the display array to be displayed based on real data of the second parity row data and enable the third parity row of the display array to be displayed based on interpolation data of the second parity row data.
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