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公开(公告)号:US20230133722A1
公开(公告)日:2023-05-04
申请号:US17515368
申请日:2021-10-29
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: THOMAS VAN VAERENBERGH , PENG SUN , MARTIN FOLTIN , RAYMOND G. BEAUSOLEIL
Abstract: Systems and methods are provided for creating and sharing knowledge among design houses. In particular, examples of the presently disclosed technology leverage the concepts of meta-optimizing and collaborative learning to reduce the computational burden shouldered by individual design houses using inverse design techniques to find optimal designs in a manner which protects intellectual property sensitive information. Examples may share versions of a central meta-optimizer (i.e. local meta-optimizers) among design houses targeting different (but related) design tasks. A local meta-optimizer can be trained to indirectly optimize a design task by computing hyper-parameters for a design house's private optimization function. The private optimization function may be using inverse design techniques to find an optimal design for a design task. This may correspond to finding a global minimum of a cost function using gradient descent techniques or more advanced global optimization techniques.
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公开(公告)号:US20220260416A1
公开(公告)日:2022-08-18
申请号:US17177024
申请日:2021-02-16
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: YUAN YUAN , THOMAS VAN VAERENBERGH , BASSEM TOSSOUN , DI LIANG
Abstract: An apparatus includes a photodetector and a memristor coupled to the photodetector. The photodetector is configured to receive and convert optical signals to electrical signals to program the memristor to an on or off state. The apparatus further includes a ring resonator coupled to the memristor and configured to modulate light based on the on or off state of the memristor.
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公开(公告)号:US20230410903A1
公开(公告)日:2023-12-21
申请号:US17841542
申请日:2022-06-15
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
CPC classification number: G11C15/046 , H03K19/20
Abstract: The disclosure generally provides for a method of solving a K-SAT problem. The method comprises programming one or more clauses of a Boolean expression for a K-SAT problem written in negated disjunctive normal form (DNF) to a ternary-CAM (TCAM) array comprising columns and rows of TCAM cells. The method further includes applying an interpretation comprising one or more binary variables expected to solve the Boolean expression as an input along the columns to the TCAM array, returning a binary value for each clause, randomly selecting one matched match line, determining a selected clause from one or more violated clause, and altering one or more literals within the interpretation using a break count for each variable of the selected clause.
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公开(公告)号:US20230019942A1
公开(公告)日:2023-01-19
申请号:US17378650
申请日:2021-07-16
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: SUHAS KUMAR , JOHN PAUL STRACHAN , THOMAS VAN VAERENBERGH
Abstract: Systems and methods are configured to provide a first problem to be solved to a network of memristors. A second problem to be solved can be gradually provided to the network of memristors. Controlled noise can be applied to the network of memristors for at least a portion of time during which the second problem is “gradually” provided to the network of memristors. A solution to the second problem can be determined.
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公开(公告)号:US20210373241A1
公开(公告)日:2021-12-02
申请号:US16883969
申请日:2020-05-26
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: PENG SUN , MIR ASHKAN SEYEDI , THOMAS VAN VAERENBERGH , MARCO FIORENTINO
IPC: G02B6/293
Abstract: Embodiments of the present disclosure provide etch-variation tolerant optical coupling components and processes for making the same. An etch-variation tolerant geometry is determined for at least one waveguide of an optical coupling component (e.g., a directional coupler). The geometry is optimized such that each fabricated instance of an optical component design with the etch-variation tolerant geometry has substantially the same coupling ratio at any etch depth between a shallow etch depth and a deep etch depth.
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公开(公告)号:US20200242448A1
公开(公告)日:2020-07-30
申请号:US16261398
申请日:2019-01-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor: JOHN PAUL STRACHAN , SUHAS KUMAR , THOMAS VAN VAERENBERGH
Abstract: Staged neural networks and methods therefor are provided for solving NP hard/complete problems. In some embodiments, the methods include identifying a plurality of second NP hard/complete problems, wherein each of the second NP hard/complete problems is similar to the first NP hard/complete problem; identifying solutions to the second NP hard/complete problems; training a deep neural network with the second NP hard/complete problems and the solutions; providing the first NP hard/complete problem to the trained deep neural network, wherein the trained deep neural network generates a preliminary solution to the first NP hard/complete problem; and providing the preliminary solution to a recursive neural network configured to execute an energy minimization search, wherein the recursive neural network generates a final solution to the problem based on the preliminary solution.
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