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    System and method for receiver equalization and stressed eye testing methodology for DDR5 memory controller
    1.
    发明授权
    System and method for receiver equalization and stressed eye testing methodology for DDR5 memory controller 有权

    公开(公告)号：US11624780B2

    公开(公告)日：2023-04-11

    申请号：US16918762

    申请日：2020-07-01

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Gang Zhao ,  Howard David ,  Xusheng Liu ,  Yongyao Li

    IPC: G11C29/00 ,  G01R31/317 ,  G11C29/02 ,  G11C29/56

    Abstract: A method for bit error rate testing a processing unit using a bit error rate tester (BERT) includes transmitting a signal pair to a receiver of the processing unit, the signal pair having jitter levels complying with a jitter threshold, tuning the signal pair to obtain a first stressed eye measurement for the receiver, wherein the first stressed eye measurement complies with a stressed eye mask, placing the processing unit into a loop-back mode, wherein data transmitted to the processing unit by the BERT is transmitted back to the BERT, transmitting a data pattern to the processing unit, receiving a looped back version of the data pattern from the processing unit, and calculating a bit error rate in accordance with the data pattern and the looped back version of the data pattern.

    System and Method for Receiver Equalization and Stressed Eye Testing Methodology for DDR5 Memory Controller
    4.
    发明申请
    System and Method for Receiver Equalization and Stressed Eye Testing Methodology for DDR5 Memory Controller 审中-公开

    公开(公告)号：US20200333396A1

    公开(公告)日：2020-10-22

    申请号：US16918762

    申请日：2020-07-01

    Applicant: Huawei Technologies Co., Ltd.

    Inventor： Gang Zhao ,  Howard David ,  Xusheng Liu ,  Yongyao Li

    IPC: G01R31/317 ,  G11C29/02 ,  G11C29/56

    Abstract: A method for bit error rate testing a processing unit using a bit error rate tester (BERT) includes transmitting a signal pair to a receiver of the processing unit, the signal pair having jitter levels complying with a jitter threshold, tuning the signal pair to obtain a first stressed eye measurement for the receiver, wherein the first stressed eye measurement complies with a stressed eye mask, placing the processing unit into a loop-back mode, wherein data transmitted to the processing unit by the BERT is transmitted back to the BERT, transmitting a data pattern to the processing unit, receiving a looped back version of the data pattern from the processing unit, and calculating a bit error rate in accordance with the data pattern and the looped back version of the data pattern.

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