Memory swapping method and apparatus

    公开(公告)号:US11928359B2

    公开(公告)日:2024-03-12

    申请号:US17867880

    申请日:2022-07-19

    Abstract: A memory swapping method and apparatus are provided. The method includes: selecting n to-be-swapped-out pages; compressing the n to-be-swapped-out pages into n compressed blocks, and buffering the n compressed blocks in a compressed data buffer area; organizing at least one of the n compressed blocks into m to-be-written units; and writing the m to-be-written units into a swap area of a non-volatile storage device in a maximum of m batches, where at least one of the m to-be-written units is stored in a segment of continuous space in the swap area. The method reduces a quantity of write times during memory swapping, thereby prolonging a service life of the non-volatile storage device.

    DATA PROCESSING METHOD AND ELECTRONIC DEVICE

    公开(公告)号:US20250103557A1

    公开(公告)日:2025-03-27

    申请号:US18973073

    申请日:2024-12-08

    Abstract: In a data processing method, an electronic device detects that a first file and a second file are duplicate files, with a first index node of the first file pointing to file data of the first file, and a second index node of the second file pointing to file data of the second file. The electronic device generates a target index node and configures the target index node to point to the file data of the first file. The electronic device associates the first index node with the target index node, and separately associates the second index node with the target index node. The electronic device then deletes the file data of the second file.

    Data writing method and apparatus for flash memory-based system

    公开(公告)号:US12130735B2

    公开(公告)日:2024-10-29

    申请号:US18147362

    申请日:2022-12-28

    CPC classification number: G06F12/0246 G06F12/0253 G06F13/1668 G06F2212/7201

    Abstract: Data writing methods and computing devices are provided. An example data writing method is applied to a computer system, and the computer system includes a file system and a flash memory-based storage system. The example data writing method includes obtaining a target logical address, where the target logical address is an address allocated from a first logical block to target data to be written into the flash memory-based storage system, the first logical block is one of multiple logical blocks in the file system, and the flash memory-based storage system includes multiple physical blocks. It is determined that the target logical address belongs to the first logical block. The target data is written into a first physical block based on a correspondence between the first logical block and the first physical block, where the first physical block is one of the multiple physical blocks.

    System architecture switching method and apparatus

    公开(公告)号:US12050896B2

    公开(公告)日:2024-07-30

    申请号:US18154560

    申请日:2023-01-13

    CPC classification number: G06F8/457

    Abstract: This application provides a system architecture switching method and apparatus. The method includes: when a system architecture needs to be switched, transforming a first system architecture into a second system architecture, where the first system architecture represents a system architecture before switching; and providing a service for a user by using the second system architecture. Dynamic switching of a system architecture is implemented by using a transformable system architecture, so that switching of different architectures can be implemented by using only one system architecture. Therefore, only code for implementing the system architecture is required, and code overheads can be reduced in comparison with a conventional technology.

    I/O Request Scheduling Method and Apparatus
    5.
    发明申请

    公开(公告)号:US20190258514A1

    公开(公告)日:2019-08-22

    申请号:US16401977

    申请日:2019-05-02

    Abstract: An I/O request scheduling method includes storing received I/O requests into a plurality of queues, where each queue corresponds to at least one process group, each process group includes one or more processes, and a received I/O request is stored into a queue corresponding to a process group to which a process corresponding to the I/O request belongs, and dispatching the I/O requests in the plurality of queues to an I/O device, where a quantity of I/O requests from a high-priority queue is greater than a quantity of I/O requests from a low-priority queue during one dispatching procedure.

    DATA TRANSMISSION METHOD, DEVICE, AND SYSTEM

    公开(公告)号:US20180239726A1

    公开(公告)日:2018-08-23

    申请号:US15958234

    申请日:2018-04-20

    Abstract: The present invention provides a data transmission method, device, and system, to perform DMA data transmission between an I/O device and multiple host devices. DMA memory addresses of the multiple hosts are mapped, to virtual addresses in a global virtual address space, a DMA memory address and a target host that correspond to the DMA virtual address are determined according to a correspondence among DMA virtual addresses, DMA memory addresses, and hosts; the DMA virtual address in the DMA packet is modified to the DMA memory address mapped to the DMA virtual address; and the modified DMA packet is sent to the target host. DMA data transmission between an I/O device and multiple hosts can be implemented, utilization of the I/O device is improved, and application scenarios of network transmission are expanded.

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