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公开(公告)号：US11216593B2
公开(公告)日：2022-01-04
申请号：US16411230
申请日：2019-05-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Qiang Ding , Yu Liu , Jiayin Lu , ZhuFeng Tan
Abstract: A data protection circuit of a chip, a chip, and an electronic device, where the data protection circuit performs bit width expansion and scrambling processing on a first alarm signal using an operation circuit to obtain a second alarm signal, and outputs the second alarm signal to a processing circuit. The processing circuit performs descrambling processing after receiving the second alarm signal to obtain a descrambling result. When the second alarm signal is attacked, the descrambling fails, and the descrambling result is an active level. The processing circuit outputs the descrambling result to a reset request circuit, and the reset request circuit generates a reset request signal according to the descrambling result.
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公开(公告)号：US11436376B2
公开(公告)日：2022-09-06
申请号：US16412932
申请日：2019-05-15
Applicant: HUAWEI TECHNOLOGIES CO., LTD.
Inventor： Feifei Yin , Yu Liu , Jiayin Lu
Abstract: The present application provides example terminal chips. One example terminal chip includes a security element, an application processor, and an interface module configured to transfer information between the application processor and the security element. The terminal chip includes a first power interface configured to receive power outside the terminal chip. A first power input port of the security element is connected to the first power interface, and at least one of the application processor or the interface module is connected to the first power interface. In the example terminal chip, a power supply port of the security element is connected to a power supply port of the application processor or the interface module of the terminal chip.
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公开(公告)号：US20190172047A1
公开(公告)日：2019-06-06
申请号：US16268294
申请日：2019-02-05
Applicant: HUAWEI TECHNOLOGIES CO.,LTD.
Inventor： Zhufeng Tan , Jiayin Lu , Yu Liu , Shaojie Sun
IPC: G06Q20/32 , H04B5/00 , G06F21/74 , H04W12/06 , H04L29/06 , H04L9/08 , G06F21/57 , G06F21/60 , G06Q20/40
Abstract: A system on chip is integrated on a first semiconductor chip, and includes: a system bus, at least one processor coupled to the system bus, and a security processor system coupled to the system bus. The security processor system includes a security processor, a first memory, multiple interfaces, and a security bus, where the security processor, the first memory, and the multiple interfaces are coupled to the security bus, and the security bus is coupled to the system bus. The security processor is configured to execute security operating system software and at least one security software application based on the security operating system software, where the at least one security software application includes mobile payment software used to implement mobile payment. The multiple interfaces include a near field communication (NFC) interface and a biometric recognition input interface.
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公开(公告)号：US09160895B2
公开(公告)日：2015-10-13
申请号：US13870575
申请日：2013-04-25
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: H04N5/06 , G09G5/006 , G09G5/12 , G09G5/36 , G09G2320/0276 , G09G2340/045 , G09G2340/0492 , G09G2370/10
Abstract: An embodiment of the present invention discloses a method for quickly responding to a signal, where the method includes: generating a frame synchronization signal; pre-reading image data, and saving the image data after processing the image data; and receiving a TE signal, and outputting the processed image data according to the TE signal. An embodiment of the present invention further discloses an apparatus for quickly responding to a signal. Using the present invention may improve a rate for responding to a signal and reduce an instantaneous bandwidth pressure on a transmission line.
Abstract translation: 本发明的实施例公开了一种快速响应信号的方法，其中该方法包括：产生帧同步信号; 预读图像数据，并且在处理图像数据之后保存图像数据; 并接收TE信号，并根据TE信号输出处理后的图像数据。 本发明的实施例还公开了一种用于快速响应信号的装置。 使用本发明可以提高响应信号的速率并减少传输线上的瞬时带宽压力。
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公开(公告)号：US09251556B2
公开(公告)日：2016-02-02
申请号：US13902081
申请日：2013-05-24
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: G06T1/60 , G09G3/2096 , G09G5/006 , G09G2350/00 , G09G2360/12 , G09G2360/121
Abstract: The present invention provides a display control method and system, and a display device. The method includes acquiring a status value of a display buffer; comparing the status value of the display buffer with a preset warning value of the display buffer; and adjusting a value of a depth of outstanding bus commands according to a comparison result. In the embodiments of the present invention, a status value of the display buffer is compared with a preset warning value of the display buffer, where the status value of the display buffer reflects a change to a current load; it may be determined whether a status value of the display buffer corresponding to the current load is normal according to a comparison result; and a value of a depth of outstanding bus commands is adjusted accordingly, effectively resolve a data real-timeness issue, and ensure that an entire system efficiently runs.
Abstract translation: 本发明提供一种显示控制方法和系统以及显示装置。 该方法包括获取显示缓冲器的状态值; 将显示缓冲器的状态值与显示缓冲器的预设警告值进行比较; 并根据比较结果调整未完成总线命令的深度值。 在本发明的实施例中，将显示缓冲器的状态值与显示缓冲器的预设警告值进行比较，其中显示缓冲器的状态值反映当前负载的变化; 可以根据比较结果确定与当前负载相对应的显示缓冲器的状态值是否正常; 并相应调整未完成总线命令的深度值，有效解决数据实时性问题，确保整个系统有效运行。
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Patent Agency Ranking
公开(公告)号：US10901029B2
公开(公告)日：2021-01-26
申请号：US15812640
申请日：2017-11-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Feifei Yin , Yu Liu , Jiayin Lu , ZhuFeng Tan
Abstract: A chip, including a selector, a one-time programmable (OTP) device, and a controller, where the controller is separately coupled to a selection end of the selector and the OTP device, and the controller is configured to detect a device value of the OTP device, and provide a first selection signal when the device value of the OTP device is within a first preset range. A first input end of the selector is configured to receive access data, a second input end of the selector is configured to receive a preset invalid value, and an output end of the selector is coupled to the OTP device. The selector is configured to control the data received by the second input end to be output from the output end of the selector when the first selection signal is input.
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公开(公告)号：US20190266358A1
公开(公告)日：2019-08-29
申请号：US16411230
申请日：2019-05-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Qiang Ding , Yu Liu , Jiayin Lu , ZhuFeng Tan
Abstract: A data protection circuit of a chip, a chip, and an electronic device, where the data protection circuit performs bit width expansion and scrambling processing on a first alarm signal using an operation circuit to obtain a second alarm signal, and outputs the second alarm signal to a processing circuit. The processing circuit performs descrambling processing after receiving the second alarm signal to obtain a descrambling result. When the second alarm signal is attacked, the descrambling fails, and the descrambling result is an active level. The processing circuit outputs the descrambling result to a reset request circuit, and the reset request circuit generates a reset request signal according to the descrambling result.
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公开(公告)号：US20180137276A1
公开(公告)日：2018-05-17
申请号：US15812992
申请日：2017-11-14
Applicant: Huawei Technologies Co., Ltd.
CPC classification number: G06F21/552 , G01R23/10 , G06F1/04 , G06F11/0754 , H03D13/001 , H03L7/195
Abstract: Embodiments of the present disclosure disclose a clock frequency detection method and apparatus. The method includes: dividing a known internal clock frequency range of the system into n frequency intervals, where each frequency interval is corresponding to a frequency detection module, and n is an integer greater than or equal to 2; obtaining a current internal clock frequency of the system, and using the current internal clock frequency as a reference clock frequency; selecting a frequency detection module corresponding to a frequency interval according to the reference clock frequency; and detecting, by the selected frequency detection module, a to-be-detected clock according to a frequency offset range of the reference clock frequency. By using the present disclosure, a risk that an internal clock of the system is attacked may be reduced, and system security may be improved.
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公开(公告)号：US20180136274A1
公开(公告)日：2018-05-17
申请号：US15812640
申请日：2017-11-14
Applicant: Huawei Technologies Co., Ltd.
Inventor： Feifei Yin , Yu Liu , Jiayin Lu , ZhuFeng Tan
IPC: G01R31/28 , H01L23/538 , H01L23/00
CPC classification number: G01R31/2856 , G01R31/2863 , G11C7/24 , G11C16/22 , G11C17/16 , G11C17/18 , H01L23/5389 , H01L24/24 , H01L24/82
Abstract: A chip, including a selector, a one-time programmable (OTP) device, and a controller, where the controller is separately coupled to a selection end of the selector and the OTP device, and the controller is configured to detect a device value of the OTP device, and provide a first selection signal when the device value of the OTP device is within a first preset range. A first input end of the selector is configured to receive access data, a second input end of the selector is configured to receive a preset invalid value, and an output end of the selector is coupled to the OTP device. The selector is configured to control the data received by the second input end to be output from the output end of the selector when the first selection signal is input.
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公开(公告)号：US20130293779A1
公开(公告)日：2013-11-07
申请号：US13870575
申请日：2013-04-25
Applicant: Huawei Technologies Co., Ltd.
IPC: H04N5/06
CPC classification number: H04N5/06 , G09G5/006 , G09G5/12 , G09G5/36 , G09G2320/0276 , G09G2340/045 , G09G2340/0492 , G09G2370/10
Abstract: An embodiment of the present invention discloses a method for quickly responding to a signal, where the method includes: generating a frame synchronization signal; pre-reading image data, and saving the image data after processing the image data; and receiving a TE signal, and outputting the processed image data according to the TE signal. An embodiment of the present invention further discloses an apparatus for quickly responding to a signal. Using the present invention may improve a rate for responding to a signal and reduce an instantaneous bandwidth pressure on a transmission line.
Abstract translation: 本发明的实施例公开了一种快速响应信号的方法，其中该方法包括：产生帧同步信号; 预读图像数据，并且在处理图像数据之后保存图像数据; 并接收TE信号，并根据TE信号输出处理后的图像数据。 本发明的实施例还公开了一种用于快速响应信号的装置。 使用本发明可以提高响应信号的速率并减少传输线上的瞬时带宽压力。
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