Magneto-resistive memory array
    6.
    发明授权
    Magneto-resistive memory array 有权
    磁阻存储器阵列

    公开(公告)号:US06765820B2

    公开(公告)日:2004-07-20

    申请号:US10352278

    申请日:2003-01-27

    IPC分类号: G11C1100

    摘要: A low power, high speed magneto-resistive memory is disclosed. The disclosed memory directly senses the resistive state of one or more magneto-resistive memory elements. This allows the memory to be read during a single read cycle, without the need for a word line current. This may substantially increase the speed and reduce the power of the memory.

    摘要翻译: 公开了一种低功率高速磁阻存储器。 所公开的存储器直接感测一个或多个磁阻存储元件的电阻状态。 这允许在单个读取周期期间读取存储器,而不需要字线电流。 这可能会显着增加速度并降低存储器的功率。

    SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
    7.
    发明申请
    SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS 有权
    具有集成晶体管的旋转器件

    公开(公告)号:US20080151610A1

    公开(公告)日:2008-06-26

    申请号:US12017308

    申请日:2008-01-21

    IPC分类号: G11C11/00

    摘要: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated Giant-Magneto-resistive (GMR) structures. The present teachings relates to integrated latch memory and logic devices and, in particular, concerns a spin dependent logic device that may be integrated with conventional semiconductor-based logic devices to construct high-speed non-volatile static random access memory (SRAM) cells.

    摘要翻译: 半导体行业寻求用改进的非易失性存储器件替代传统的易失性存储器件。 对显着高效,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 本教导涉及集成的锁存存储器和逻辑器件,并且特别涉及可以与常规的基于半导体的逻辑器件集成以构建高速非易失性静态随机存取存储器(SRAM)单元的自旋相关逻辑器件。

    Spintronic devices with integrated transistors
    8.
    发明授权
    Spintronic devices with integrated transistors 有权
    带集成晶体管的Spintronic器件

    公开(公告)号:US07339818B2

    公开(公告)日:2008-03-04

    申请号:US11146997

    申请日:2005-06-06

    IPC分类号: G11C11/00

    摘要: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated Giant-Magneto-resistive (GMR) structures. The present teachings relates to integrated latch memory and logic devices and, in particular, concerns a spin dependent logic device that may be integrated with conventional semiconductor-based logic devices to construct high-speed non-volatile static random access memory (SRAM) cells.

    摘要翻译: 半导体行业寻求用改进的非易失性存储器件替代传统的易失性存储器件。 对显着高效,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 本教导涉及集成的锁存存储器和逻辑器件,并且特别涉及可以与常规的基于半导体的逻辑器件集成以构建高速非易失性静态随机存取存储器(SRAM)单元的自旋相关逻辑器件。

    Spintronic devices with integrated transistors
    9.
    发明授权
    Spintronic devices with integrated transistors 有权
    带集成晶体管的Spintronic器件

    公开(公告)号:US08503224B2

    公开(公告)日:2013-08-06

    申请号:US13448076

    申请日:2012-04-16

    IPC分类号: G11C11/00

    摘要: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated Giant-Magneto-resistive (GMR) structures. The present teachings relates to integrated latch memory and logic devices and, in particular, concerns a spin dependent logic device that may be integrated with conventional semiconductor-based logic devices to construct high-speed non-volatile static random access memory (SRAM) cells.

    摘要翻译: 半导体行业寻求用改进的非易失性存储器件替代传统的易失性存储器件。 对显着高效,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 本教导涉及集成的锁存存储器和逻辑器件,并且特别涉及可以与常规的基于半导体的逻辑器件集成以构建高速非易失性静态随机存取存储器(SRAM)单元的自旋相关逻辑器件。

    SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS
    10.
    发明申请
    SPINTRONIC DEVICES WITH INTEGRATED TRANSISTORS 有权
    具有集成晶体管的旋转器件

    公开(公告)号:US20110280063A1

    公开(公告)日:2011-11-17

    申请号:US13193523

    申请日:2011-07-28

    IPC分类号: G11C11/16

    摘要: The semiconductor industry seeks to replace traditional volatile memory devices with improved non-volatile memory devices. The increased demand for a significantly advanced, efficient, and non-volatile data retention technique has driven the development of integrated Giant-Magneto-resistive (GMR) structures. The present teachings relates to integrated latch memory and logic devices and, in particular, concerns a spin dependent logic device that may be integrated with conventional semiconductor-based logic devices to construct high-speed non-volatile static random access memory (SRAM) cells.

    摘要翻译: 半导体行业寻求用改进的非易失性存储器件替代传统的易失性存储器件。 对显着高效,高效和非易失性数据保留技术的需求的增加推动了集成的巨磁阻(GMR)结构的发展。 本教导涉及集成的锁存存储器和逻辑器件,并且特别涉及可以与常规的基于半导体的逻辑器件集成以构建高速非易失性静态随机存取存储器(SRAM)单元的自旋相关逻辑器件。