Layout methods of integrated circuits having unit MOS devices
    1.
    发明授权
    Layout methods of integrated circuits having unit MOS devices 有权
    具有单位MOS器件的集成电路的布局方法

    公开(公告)号:US08803202B2

    公开(公告)日:2014-08-12

    申请号:US13558109

    申请日:2012-07-25

    IPC分类号: H01L27/118

    摘要: A semiconductor structure includes an array of unit metal-oxide-semiconductor (MOS) devices arranged in a plurality of rows and a plurality of columns is provided. Each of the unit MOS devices includes an active region laid out in a row direction and a gate electrode laid out in a column direction. The semiconductor structure further includes a first unit MOS device in the array and a second unit MOS device in the array, wherein active regions of the first and the second unit MOS devices have different conductivity types.

    摘要翻译: 半导体结构包括以多行排列的单位金属氧化物半导体(MOS)器件的阵列,并且提供多个列。 每个单位MOS器件包括布置在行方向上的有源区和沿列方向布置的栅电极。 半导体结构还包括阵列中的第一单元MOS器件和阵列中的第二单元MOS器件,其中第一和第二单位MOS器件的有源区具有不同的导电类型。

    Layout methods of integrated circuits having unit MOS devices
    2.
    发明申请
    Layout methods of integrated circuits having unit MOS devices 有权
    具有单位MOS器件的集成电路的布局方法

    公开(公告)号:US20080296691A1

    公开(公告)日:2008-12-04

    申请号:US11807654

    申请日:2007-05-30

    IPC分类号: H01L29/76

    摘要: A semiconductor structure includes an array of unit metal-oxide-semiconductor (MOS) devices arranged in a plurality of rows and a plurality of columns is provided. Each of the unit MOS devices includes an active region laid out in a row direction and a gate electrode laid out in a column direction. The semiconductor structure further includes a first unit MOS device in the array and a second unit MOS device in the array, wherein active regions of the first and the second unit MOS devices have different conductivity types.

    摘要翻译: 半导体结构包括以多行排列的单位金属氧化物半导体(MOS)器件的阵列,并且提供多个列。 每个单位MOS器件包括布置在行方向上的有源区和沿列方向布置的栅电极。 半导体结构还包括阵列中的第一单元MOS器件和阵列中的第二单元MOS器件,其中第一和第二单位MOS器件的有源区具有不同的导电类型。

    Layout Methods of Integrated Circuits Having Unit MOS Devices
    3.
    发明申请
    Layout Methods of Integrated Circuits Having Unit MOS Devices 有权
    具有单位MOS器件的集成电路布局方法

    公开(公告)号:US20120286368A1

    公开(公告)日:2012-11-15

    申请号:US13558109

    申请日:2012-07-25

    IPC分类号: H01L27/088

    摘要: A semiconductor structure includes an array of unit metal-oxide-semiconductor (MOS) devices arranged in a plurality of rows and a plurality of columns is provided. Each of the unit MOS devices includes an active region laid out in a row direction and a gate electrode laid out in a column direction. The semiconductor structure further includes a first unit MOS device in the array and a second unit MOS device in the array, wherein active regions of the first and the second unit MOS devices have different conductivity types.

    摘要翻译: 半导体结构包括以多行排列的单位金属氧化物半导体(MOS)器件的阵列,并且提供多个列。 每个单位MOS器件包括布置在行方向上的有源区和沿列方向布置的栅电极。 半导体结构还包括阵列中的第一单元MOS器件和阵列中的第二单元MOS器件,其中第一和第二单位MOS器件的有源区具有不同的导电类型。

    Layout methods of integrated circuits having unit MOS devices
    4.
    发明授权
    Layout methods of integrated circuits having unit MOS devices 有权
    具有单位MOS器件的集成电路的布局方法

    公开(公告)号:US08237201B2

    公开(公告)日:2012-08-07

    申请号:US11807654

    申请日:2007-05-30

    IPC分类号: H01L27/118

    摘要: A semiconductor structure includes an array of unit metal-oxide-semiconductor (MOS) devices arranged in a plurality of rows and a plurality of columns is provided. Each of the unit MOS devices includes an active region laid out in a row direction and a gate electrode laid out in a column direction. The semiconductor structure further includes a first unit MOS device in the array and a second unit MOS device in the array, wherein active regions of the first and the second unit MOS devices have different conductivity types.

    摘要翻译: 半导体结构包括以多行排列的单位金属氧化物半导体(MOS)器件的阵列,并且提供多个列。 每个单位MOS器件包括布置在行方向上的有源区和沿列方向布置的栅电极。 半导体结构还包括阵列中的第一单元MOS器件和阵列中的第二单元MOS器件,其中第一和第二单位MOS器件的有源区具有不同的导电类型。