Thread execution analyzer
    1.
    发明授权
    Thread execution analyzer 有权
    线程执行分析器

    公开(公告)号:US08418148B2

    公开(公告)日:2013-04-09

    申请号:US12394445

    申请日:2009-02-27

    IPC分类号: G06F9/45

    CPC分类号: G06F11/3636

    摘要: A thread execution analyzer analyzes blocking events of threads in a program using execution data and callstacks collected at the blocking events. The thread execution analyzer attempts to identify an application programming interface (API) responsible for each blocking event and provides blocking analysis information to a user. The blocking analysis information may be used by a developer of the program to understand the causes of blocking events that occur for threads of the program.

    摘要翻译: 线程执行分析器使用在阻塞事件处收集的执行数据和调用堆栈来分析程序中线程的阻塞事件。 线程执行分析器尝试识别负责每个阻塞事件的应用程序编程接口(API),并向用户提供阻止分析信息。 程序的开发人员可以使用阻止分析信息来了解程序线程发生的阻塞事件的原因。

    MEASUREMENT AND REPORTING OF PERFORMANCE EVENT RATES
    2.
    发明申请
    MEASUREMENT AND REPORTING OF PERFORMANCE EVENT RATES 有权
    测量和报告性能事件发生率

    公开(公告)号:US20100251160A1

    公开(公告)日:2010-09-30

    申请号:US12411435

    申请日:2009-03-26

    IPC分类号: G06F9/30 G06F3/048

    摘要: Methods and systems are disclosed for measuring performance event rates at a computer and reporting the performance event rates using timelines. A particular method tracks, for a time period, the occurrences of a particular event at a computer. Event rates corresponding to different time segments within the time period are calculated, and the time segments are assigned colors based on their associated event rates. The event rates are used to display a colored timeline for the time period, including displaying a colored timeline portion for each time segment in its associated color.

    摘要翻译: 公开了用于测量计算机的性能事件发生率并使用时间表报告性能事件发生率的方法和系统。 特定方法在一段时间内跟踪计算机上特定事件的发生。 计算对应于该时间段内的不同时间段的事件速率,并且基于它们相关联的事件发生率来分配时间段的颜色。 事件速率用于显示该时间段的彩色时间线,包括在其相关联的颜色中显示每个时间段的彩色时间线部分。

    Data-scoped dynamic data race detection

    公开(公告)号:US10241894B2

    公开(公告)日:2019-03-26

    申请号:US12823794

    申请日:2010-06-25

    IPC分类号: G06F11/36

    摘要: A dynamic shared-memory data race detection tool with data-scoping capabilities to reduce runtime overheads is disclosed. The tool allows users to restrict analysis of memory locations to heap and/or stack variables that are of interest to them using explicit calls to functions provided in a library that is part of the race detection tool. The application code is instrumented to insert probes at all memory instructions and linked with the data race detection library to perform data-scoped race detection.

    Measurement and reporting of performance event rates
    4.
    发明授权
    Measurement and reporting of performance event rates 有权
    绩效事件发生率的测量和报告

    公开(公告)号:US08572581B2

    公开(公告)日:2013-10-29

    申请号:US12411435

    申请日:2009-03-26

    IPC分类号: G06F9/44

    摘要: Methods and systems are disclosed for measuring performance event rates at a computer and reporting the performance event rates using timelines. A particular method tracks, for a time period, the occurrences of a particular event at a computer. Event rates corresponding to different time segments within the time period are calculated, and the time segments are assigned colors based on their associated event rates. The event rates are used to display a colored timeline for the time period, including displaying a colored timeline portion for each time segment in its associated color.

    摘要翻译: 公开了用于测量计算机的性能事件发生率并使用时间表报告性能事件发生率的方法和系统。 特定方法在一段时间内跟踪计算机上特定事件的发生。 计算对应于该时间段内的不同时间段的事件速率,并且基于它们相关联的事件发生率来分配时间段的颜色。 事件速率用于显示该时间段的彩色时间线,包括在其相关联的颜色中显示每个时间段的彩色时间线部分。

    THREAD EXECUTION ANALYZER
    5.
    发明申请
    THREAD EXECUTION ANALYZER 有权
    螺纹执行分析仪

    公开(公告)号:US20100223600A1

    公开(公告)日:2010-09-02

    申请号:US12394445

    申请日:2009-02-27

    IPC分类号: G06F9/44

    CPC分类号: G06F11/3636

    摘要: A thread execution analyzer analyzes blocking events of threads in a program using execution data and callstacks collected at the blocking events. The thread execution analyzer attempts to identify an application programming interface (API) responsible for each blocking event and provides blocking analysis information to a user. The blocking analysis information may be used by a developer of the program to understand the causes of blocking events that occur for threads of the program.

    摘要翻译: 线程执行分析器使用在阻塞事件处收集的执行数据和调用堆栈来分析程序中线程的阻塞事件。 线程执行分析器尝试识别负责每个阻塞事件的应用程序编程接口(API),并向用户提供阻止分析信息。 程序的开发人员可以使用阻止分析信息来了解程序线程发生的阻塞事件的原因。

    DATA-SCOPED DYNAMIC DATA RACE DETECTION
    6.
    发明申请
    DATA-SCOPED DYNAMIC DATA RACE DETECTION 审中-公开
    数据量化动态数据检测

    公开(公告)号:US20110320745A1

    公开(公告)日:2011-12-29

    申请号:US12823794

    申请日:2010-06-25

    IPC分类号: G06F12/00

    CPC分类号: G06F11/3636 G06F11/3624

    摘要: A dynamic shared-memory data race detection tool with data-scoping capabilities to reduce runtime overheads is disclosed. The tool allows users to restrict analysis of memory locations to heap and/or stack variables that are of interest to them using explicit calls to functions provided in a library that is part of the race detection tool. The application code is instrumented to insert probes at all memory instructions and linked with the data race detection library to perform data-scoped race detection.

    摘要翻译: 公开了一种具有数据范围功能的动态共享内存数据竞争检测工具,以减少运行时开销。 该工具允许用户使用显式调用作为竞争检测工具一部分的库中提供的函数来限制内存位置对堆和/或堆栈变量的分析。 测试应用程序代码将探针插入所有存储器指令,并与数据竞争检测库链接以执行数据范围的种族检测。

    Analysis and visualization of application concurrency and processor resource utilization
    7.
    发明授权
    Analysis and visualization of application concurrency and processor resource utilization 有权
    应用程序并发和处理器资源利用的分析和可视化

    公开(公告)号:US09594656B2

    公开(公告)日:2017-03-14

    申请号:US12605932

    申请日:2009-10-26

    申请人: Hazim Shafi

    发明人: Hazim Shafi

    摘要: An analysis and visualization depicts how an application is leveraging computer processor cores in time. The analysis and visualization enables a developer to readily identify the degree of concurrency exploited by an application at runtime. Information regarding processes or threads running on the processor cores over time is received, analyzed, and presented to indicate portions of processor cores that are used by the application, idle, or used by other processes in the system. The analysis and visualization can help a developer understand contention for processor resources, confirm the degree of concurrency, or identify serial regions of execution that might provide opportunities for exploiting parallelism.

    摘要翻译: 分析和可视化描述了应用程序如何及时利用计算机处理器内核。 分析和可视化使开发人员能够在运行时轻松识别应用程序利用的并发程度。 接收,分析和呈现关于在时间上在处理器核上运行的进程或线程的信息,以指示应用程序使用的处理器核心部分,空闲或由系统中的其他进程使用。 分析和可视化可以帮助开发人员了解处理器资源的争用,确认并发程度,或确定可能提供利用并行性的机会的连续执行区域。

    Data processing system and method for reducing cache pollution by write stream memory access patterns
    8.
    发明授权
    Data processing system and method for reducing cache pollution by write stream memory access patterns 有权
    用于通过写入流存储器访问模式减少高速缓存污染的数据处理系统和方法

    公开(公告)号:US08909871B2

    公开(公告)日:2014-12-09

    申请号:US11462115

    申请日:2006-08-03

    IPC分类号: G06F12/02 G06F12/08

    CPC分类号: G06F12/0888

    摘要: A data processing system includes a system memory and a cache hierarchy that caches contents of the system memory. According to one method of data processing, a storage modifying operation having a cacheable target real memory address is received. A determination is made whether or not the storage modifying operation has an associated bypass indication. In response to determining that the storage modifying operation has an associated bypass indication, the cache hierarchy is bypassed, and an update indicated by the storage modifying operation is performed in the system memory. In response to determining that the storage modifying operation does not have an associated bypass indication, the update indicated by the storage modifying operation is performed in the cache hierarchy.

    摘要翻译: 数据处理系统包括缓存系统存储器的内容的系统存储器和高速缓存层级。 根据一种数据处理方法,接收具有可缓存目标实际存储器地址的存储修改操作。 确定存储修改操作是否具有相关的旁路指示。 响应于确定存储修改操作具有相关联的旁路指示,忽略高速缓存层级,并且在系统存储器中执行由存储修改操作指示的更新。 响应于确定存储修改操作没有相关联的旁路指示,在高速缓存层级中执行由存储修改操作指示的更新。

    ASSIST THREAD FOR INJECTING CACHE MEMORY IN A MICROPROCESSOR
    9.
    发明申请
    ASSIST THREAD FOR INJECTING CACHE MEMORY IN A MICROPROCESSOR 有权
    在微处理器中注入高速缓存存储器的辅助螺纹

    公开(公告)号:US20120198459A1

    公开(公告)日:2012-08-02

    申请号:US13434423

    申请日:2012-03-29

    IPC分类号: G06F9/46 G06F12/08

    摘要: A data processing system includes a microprocessor having access to multiple levels of cache memories. The microprocessor executes a main thread compiled from a source code object. The system includes a processor for executing an assist thread also derived from the source code object. The assist thread includes memory reference instructions of the main thread and only those arithmetic instructions required to resolve the memory reference instructions. A scheduler configured to schedule the assist thread in conjunction with the corresponding execution thread is configured to execute the assist thread ahead of the execution thread by a determinable threshold such as the number of main processor cycles or the number of code instructions. The assist thread may execute in the main processor or in a dedicated assist processor that makes direct memory accesses to one of the lower level cache memory elements.

    摘要翻译: 数据处理系统包括具有访问多级缓存存储器的微处理器。 微处理器执行从源代码对象编译的主线程。 该系统包括用于执行也源自源代码对象的辅助线程的处理器。 辅助线程包括主线程的存储器参考指令和仅解析存储器参考指令所需的算术指令。 配置成与对应的执行线程一起调度辅助线程的调度器被配置为通过诸如主处理器周期的数量或代码指令的数量的可确定的阈值来执行执行线程之前的辅助线程。 辅助线程可以在主处理器或专用辅助处理器中执行,该处理器直接对下一级高速缓冲存储器元件之一进行存储器访问。

    Assist thread for injecting cache memory in a microprocessor
    10.
    发明授权
    Assist thread for injecting cache memory in a microprocessor 有权
    协助在微处理器中注入高速缓存的线程

    公开(公告)号:US08230422B2

    公开(公告)日:2012-07-24

    申请号:US11034546

    申请日:2005-01-13

    IPC分类号: G06F9/46 G06F9/40 G06F13/28

    摘要: A data processing system includes a microprocessor having access to multiple levels of cache memories. The microprocessor executes a main thread compiled from a source code object. The system includes a processor for executing an assist thread also derived from the source code object. The assist thread includes memory reference instructions of the main thread and only those arithmetic instructions required to resolve the memory reference instructions. A scheduler configured to schedule the assist thread in conjunction with the corresponding execution thread is configured to execute the assist thread ahead of the execution thread by a determinable threshold such as the number of main processor cycles or the number of code instructions. The assist thread may execute in the main processor or in a dedicated assist processor that makes direct memory accesses to one of the lower level cache memory elements.

    摘要翻译: 数据处理系统包括具有访问多级缓存存储器的微处理器。 微处理器执行从源代码对象编译的主线程。 该系统包括用于执行也源自源代码对象的辅助线程的处理器。 辅助线程包括主线程的存储器参考指令和仅解析存储器参考指令所需的算术指令。 配置成与对应的执行线程一起调度辅助线程的调度器被配置为通过诸如主处理器周期的数量或代码指令的数量的可确定的阈值来执行执行线程之前的辅助线程。 辅助线程可以在主处理器或专用辅助处理器中执行,该处理器直接对下一级高速缓冲存储器元件之一进行存储器访问。