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    METHOD TO FORM SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE THEREOF
    1.
    发明公开
    METHOD TO FORM SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE THEREOF 审中-公开

    公开(公告)号：US20230317526A1

    公开(公告)日：2023-10-05

    申请号：US17657835

    申请日：2022-04-04

    申请人： HeFeChip Corporation Limited

    发明人： LIANG LI ,  Chun Yu Wong ,  John Zhang ,  HUANG LIU ,  Sunil Singh ,  Heng Yang

    IPC分类号： H01L21/84 ,  H01L27/12

    CPC分类号： H01L21/845 ,  H01L27/1211

    摘要： The present invention proposes a semiconductor device. The semiconductor device includes a first and a second transistor sets, a fin pattern, a rare earth oxide layer and an insulation layer. The first and a second transistor sets commonly have at the bases thereof a buried oxide layer (BOX), wherein the first transistor set has a rare earth oxide. The fin pattern on the BOX within a first region for the first transistor set and a second region for the second transistor set. The rare earth oxide layer includes the rare earth oxide and is formed on the BOX and the fin pattern in the first region. The insulation layer is formed on the rare earth oxide layer in the first region, the BOX and the fin pattern in the second region.

    SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF 有权

    公开(公告)号：US20210118888A1

    公开(公告)日：2021-04-22

    申请号：US16658135

    申请日：2019-10-20

    申请人： HeFeChip Corporation Limited

    发明人： John Zhang ,  Yanzun Li ,  GuoLiang Zhu ,  Tongqing Chen ,  Huang Liu

    IPC分类号： H01L27/108

    摘要： A semiconductor device including a silicon-on-insulator (SOI) wafer comprising a doped silicon substrate, a buried oxide layer on the doped silicon substrate, and a silicon device layer on the buried oxide layer. At least a trench capacitor is disposed in a trench of the SOI wafer. The trench capacitor penetrates through the buried oxide layer and extends into the doped silicon substrate. At least a select transistor is disposed on the silicon device layer. The select transistor includes a source doping region and a drain doping region, a channel region between the source doping region and the drain doping region, and a gate over the channel region. At least an embedded contact is disposed atop the trench capacitor to electrically couple the drain doping region of the select transistor with an inner electrode of the trench capacitor.

    Semiconductor device and fabrication method thereof
    3.
    发明授权
    Semiconductor device and fabrication method thereof 有权

    公开(公告)号：US11049862B2

    公开(公告)日：2021-06-29

    申请号：US16658135

    申请日：2019-10-20

    申请人： HeFeChip Corporation Limited

    发明人： John Zhang ,  Yanzun Li ,  GuoLiang Zhu ,  Tongqing Chen ,  Huang Liu

    IPC分类号： H01L27/108

    摘要： A semiconductor device including a silicon-on-insulator (SOI) wafer comprising a doped silicon substrate, a buried oxide layer on the doped silicon substrate, and a silicon device layer on the buried oxide layer. An inner electrode and a node dielectric layer of a capacitor are disposed in a trench of the SOI wafer. The inner electrode and the node dielectric layer penetrate through the buried oxide layer and extend into the doped silicon substrate. At least a select transistor is disposed on the buried oxide layer. The select transistor includes a source doping region and a drain doping region, a channel region between the source doping region and the drain doping region, and a gate over the channel region. At least an embedded contact is disposed atop the capacitor to electrically couple the drain doping region of the select transistor with the inner electrode of the capacitor.