SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF 审中-公开
    半导体存储器件及其工作方法

    公开(公告)号:US20120170376A1

    公开(公告)日:2012-07-05

    申请号:US13339092

    申请日:2011-12-28

    CPC classification number: G11C16/344 G11C16/14 G11C16/3418

    Abstract: A semiconductor memory device includes a plurality of memory cells, including an N well formed within a P type region and a P well formed within the N well, a peripheral circuit configured to perform a program, program verify, read, erase, or erase verify operation on memory cells selected from among the memory cells, a voltage supply circuit configured to generate a positive voltage and a negative voltage for the program, program verify, read, erase, or erase verify operation, and a control circuit configured to control the peripheral circuit and the voltage supply circuit so that the program, program verify, read, erase, or erase verify operation is performed and, when the program verify and read operations are performed, different voltage is supplied to the P well and the N well.

    Abstract translation: 半导体存储器件包括多个存储器单元,包括在P型区域内形成的N阱和形成在N阱内的P阱,配置为执行程序,程序验证,读取,擦除或擦除验证的外围电路 对从存储单元中选择的存储单元进行操作;电压供给电路,被配置为产生用于程序的正电压和负电压,程序验证,读取,擦除或擦除验证操作;以及控制电路, 电路和电压供应电路,以便执行程序,程序验证,读取,擦除或擦除验证操作,并且当执行程序验证和读取操作时,向P阱和N阱提供不同的电压。

    FLASH MEMORY DEVICE AND METHOD OF OPERATING THE SAME
    2.
    发明申请
    FLASH MEMORY DEVICE AND METHOD OF OPERATING THE SAME 有权
    闪存存储器件及其操作方法

    公开(公告)号:US20120039127A1

    公开(公告)日:2012-02-16

    申请号:US13281312

    申请日:2011-10-25

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/0483 G11C16/10 G11C16/3427

    Abstract: A method for operating a flash memory device includes applying a pass voltage to a drain pass word line, a source pass word line, and unselected word lines. The drain pass word line is provided between a drain select line and a word line. The drain pass word line has a structure in the same manner as the word lines. The source pass word line is provided between a source select line and a word line. The source pass word line has a structure in the same manner as the word lines. A program voltage is applied to a selected word line associated with a selected memory cell block. A ground voltage is applied to drain pass word lines and source pass word lines. Word lines associated with unselected memory cell blocks are set to a floating state.

    Abstract translation: 一种用于操作闪速存储器件的方法包括将通过电压施加到漏极通过字线,源极字线和未选字线。 漏极通行字线设置在漏极选择线和字线之间。 漏极字线具有与字线相同的结构。 在源选择线和字线之间提供源通过字线。 源通道字线具有与字线相同的结构。 将编程电压施加到与所选择的存储器单元块相关联的选定字线。 接地电压被施加到漏通字线和源通路字线。 与未选择的存储单元块相关联的字线设置为浮动状态。

    FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF
    3.
    发明申请
    FLASH MEMORY DEVICE AND PROGRAM METHOD THEREOF 有权
    闪存存储器件及其程序方法

    公开(公告)号:US20100202209A1

    公开(公告)日:2010-08-12

    申请号:US12763127

    申请日:2010-04-19

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/10

    Abstract: A flash memory device includes a memory cell array on which data is stored, and page buffers that are connected to the memory cells through the bit lines and apply one of the first voltage, second voltage or third voltage between the first and second voltage, to the respective bit line when performing the program.

    Abstract translation: 闪速存储器件包括存储有数据的存储单元阵列和通过位线连接到存储器单元并将第一和第二电压之间的第一电压,第二电压或第三电压中的一个施加到第一和第二电压之间的页缓冲器, 执行程序时的相应位线。

    METHOD FOR PROGRAMMING A FLASH MEMORY DEVICE
    4.
    发明申请
    METHOD FOR PROGRAMMING A FLASH MEMORY DEVICE 有权
    用于编程闪速存储器件的方法

    公开(公告)号:US20100002520A1

    公开(公告)日:2010-01-07

    申请号:US12559374

    申请日:2009-09-14

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/0483

    Abstract: A method for programming a flash memory device includes applying a program bias to a memory cell of a plurality of memory cells within a memory cell string. Each memory cell string comprises a source select line, a plurality of memory cells and a drain select line. A first pass bias is applied to at least one of the memory cells in a source select line direction relative to the memory cell to which the program bias has been applied. A second pass bias is applied to the memory cells in a drain select line direction relative the memory cell(s) to which the first pass bias has been applied.

    Abstract translation: 一种用于对闪速存储器件进行编程的方法包括将程序偏置应用于存储单元串内的多个存储单元的存储单元。 每个存储器单元串包括源选择线,多个存储单元和漏极选择线。 相对于已经应用了程序偏置的存储单元,在源选择线方向中的至少一个存储单元施加第一通过偏压。 相对于已经施加了第一通过偏压的存储单元,在漏选择线方向上对存储单元施加第二偏压。

    SEMICONDUCTOR MEMORY DEVICE
    5.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 审中-公开
    半导体存储器件

    公开(公告)号:US20120008361A1

    公开(公告)日:2012-01-12

    申请号:US13176775

    申请日:2011-07-06

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/0483 G11C16/3418

    Abstract: A semiconductor memory device includes cell gate lines arranged in parallel over a semiconductor substrate, gate lines for select transistors disposed over the semiconductor substrate adjacent to the gate lines of the outermost memory cells, from among the gate lines for the memory cells, and metal lines coupled to the select transistors through contacts.

    Abstract translation: 半导体存储器件包括在半导体衬底上平行布置的单元栅极线,用于存储单元的栅极线之间的与最外存储单元的栅极线相邻的半导体衬底上的选择晶体管的栅极线和金属线 通过触点耦合到选择晶体管。

    PROGRAM METHOD OF FLASH MEMORY DEVICE
    6.
    发明申请
    PROGRAM METHOD OF FLASH MEMORY DEVICE 有权
    闪存存储器件的程序方法

    公开(公告)号:US20110026330A1

    公开(公告)日:2011-02-03

    申请号:US12903968

    申请日:2010-10-13

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/0483 G11C16/10 G11C16/3418 G11C16/3427

    Abstract: In a program method of a flash memory device where memory cells within a string are turned on to electrically connect channel regions, all of the channel regions within a second string are precharged uniformly by applying a ground voltage to a first bit line connected to a first string including to-be-programmed cells and a program-inhibited voltage to a second bit line connected to the second string including program-inhibited cells. If a program operation is executed, channel boosting occurs in the channel regions within the second string including the program-inhibited cells. Accordingly, a channel boosting potential can be increased and a program disturbance phenomenon, in which the threshold voltage of program-inhibited cells is changed, can be prevented.

    Abstract translation: 在闪存器件的编程方法中,串联中的存储器单元导通以电连接沟道区,第二串中的所有沟道区均匀地通过将地电压施加到连接到第一栅极的第一位线 包括被编程单元的串和向连接到包括程序禁止单元的第二串的第二位线的程序禁止电压。 如果执行程序操作,则在包括程序禁止的单元的第二串内的通道区域中发生通道升压。 因此,可以增加通道增压电位,并且可以防止程序禁止的电池的阈值电压改变的程序干扰现象。

    Non-Volatile Memory Device and Method of Operating the Same
    7.
    发明申请
    Non-Volatile Memory Device and Method of Operating the Same 失效
    非易失性存储器件及其操作方法

    公开(公告)号:US20090086545A1

    公开(公告)日:2009-04-02

    申请号:US12233241

    申请日:2008-09-18

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/349

    Abstract: The present invention relates to a method of operating a non-volatile memory device. In an aspect of the present invention, the method includes performing a first program operation on the entire memory cells, measuring a first program speed of a reference memory cell, storing the first program speed in a program speed storage unit, repeatedly performing a program/erase operation until before a number of the program/erase operation corresponds to a specific reference value, when the number of the program/erase operation corresponds to the specific reference value, measuring a second program speed of the reference memory cell, calculating a difference between the first program speed and the second program speed, resetting a program start voltage according to the calculated program speed difference, and performing the program/erase operation based on the reset program start voltage.

    Abstract translation: 本发明涉及一种操作非易失性存储器件的方法。 在本发明的一个方面,该方法包括对整个存储单元执行第一程序操作,测量参考存储单元的第一编程速度,将第一程序速度存储在程序速度存储单元中,重复执行程序/ 擦除操作,直到编程/擦除操作的数目对应于特定参考值,当编程/擦除操作的数量对应于特定参考值时,测量参考存储器单元的第二编程速度, 第一编程速度和第二编程速度,根据计算出的程序速度差重置程序启动电压,并且基于复位程序启动电压执行编程/擦除操作。

    PROGRAM METHOD OF FLASH MEMORY DEVICE
    8.
    发明申请
    PROGRAM METHOD OF FLASH MEMORY DEVICE 审中-公开
    闪存存储器件的程序方法

    公开(公告)号:US20090067248A1

    公开(公告)日:2009-03-12

    申请号:US11965345

    申请日:2007-12-27

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/0483 G11C16/10 G11C16/3418 G11C16/3427

    Abstract: In a program method of a flash memory device where memory cells within a string are turned on to electrically connect channel regions, all of the channel regions within a second string are precharged uniformly by applying a ground voltage to a first bit line connected to a first string including to-be-programmed cells and a program-inhibited voltage to a second bit line connected to the second string including program-inhibited cells. If a program operation is executed, channel boosting occurs in the channel regions within the second string including the program-inhibited cells. Accordingly, a channel boosting potential can be increased and a program disturbance phenomenon, in which the threshold voltage of program-inhibited cells is changed, can be prevented.

    Abstract translation: 在闪存器件的编程方法中,串联中的存储器单元导通以电连接沟道区,第二串中的所有沟道区均匀地通过将地电压施加到连接到第一栅极的第一位线 包括被编程单元的串和向连接到包括程序禁止单元的第二串的第二位线的程序禁止电压。 如果执行程序操作,则在包括程序禁止的单元的第二串内的通道区域中发生通道升压。 因此,可以增加通道增压电位,并且可以防止程序禁止的电池的阈值电压改变的程序干扰现象。

    METHOD OF PROGRAMMING NON-VOLATILE MEMORY DEVICE
    9.
    发明申请
    METHOD OF PROGRAMMING NON-VOLATILE MEMORY DEVICE 有权
    编程非易失性存储器件的方法

    公开(公告)号:US20090129170A1

    公开(公告)日:2009-05-21

    申请号:US12147109

    申请日:2008-06-26

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/3418

    Abstract: A method of programming a non-volatile memory device includes, a bit line, to which a program-inhibited cell is connected, being precharged. After precharging the bit line, a program voltage is applied to a first word line selected for program. When a memory cell connected to a second word line, which is adjacent to the first word line in a direction of a drain select line, is a cell to be programmed, a first pass voltage is applied to the second word line and a second pass voltage is applied to the remaining word lines other than the first and second word lines.

    Abstract translation: 对非易失性存储器件进行编程的方法包括被预充电的与程序禁止的单元连接的位线。 在对位线进行预充电之后,将程序电压施加到为程序选择的第一字线。 当连接到与排列选择线方向相邻的第一字线的第二字线的存储器单元是要被编程的单元时,第一通过电压被施加到第二字线并且第二通道 电压被施加到除第一和第二字线之外的剩余字线。

    CELL ARRAY OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DRIVING THE SAME
    10.
    发明申请
    CELL ARRAY OF SEMICONDUCTOR MEMORY DEVICE AND METHOD OF DRIVING THE SAME 有权
    半导体存储器件的细胞阵列及其驱动方法

    公开(公告)号:US20080239810A1

    公开(公告)日:2008-10-02

    申请号:US11965974

    申请日:2007-12-28

    Applicant: Hee Youl LEE

    Inventor: Hee Youl LEE

    CPC classification number: G11C16/24

    Abstract: A cell array of a flash memory device includes first and second memory block units, and a voltage generator. Each of the first and second memory block units includes a plurality of memory blocks having a plurality of memory cells. The voltage generator outputs a source voltage, a power supply voltage and a positive bias to the first and second memory block units. The first and second memory block units are connected in parallel through a bit line.

    Abstract translation: 闪存器件的单元阵列包括第一和第二存储器块单元和电压发生器。 第一和第二存储块单元中的每一个包括具有多个存储单元的多个存储块。 电压发生器向第一和第二存储器单元输出源电压,电源电压和正偏压。 第一和第二存储器块单元通过位线并联连接。

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