公开(公告)号：US20200381479A1

公开(公告)日：2020-12-03

申请号：US16994993

申请日：2020-08-17

申请人： Hefei Reliance Memory Limited

发明人： Zhichao LU ,  Brent Steven HAUKNESS

IPC分类号： H01L27/24 ,  H01L45/00 ,  G11C7/12 ,  G11C13/00

摘要： Disclosed is a resistive random access memory (RRAM). The RRAM includes a bottom electrode made of tungsten and a switching layer made of hafnium oxide disposed above the bottom electrode, wherein the switching layer includes a switchable filament. The RRAM further includes a resistive layer disposed above the switching layer and a bit line disposed above the resistive layer, wherein the resistive layer extends laterally to connect two or more memory cells along the bit line.

公开(公告)号：US20200327865A1

公开(公告)日：2020-10-15

申请号：US16842385

申请日：2020-04-07

申请人： HEFEI RELIANCE MEMORY LIMITED

发明人： Liang ZHAO ,  Zhichao LU ,  Zhigang HAN

IPC分类号： G09G5/00 ,  G11C7/10

摘要： Circuitry for adjusting luminance of a display device is provided. The circuitry includes a non-volatile memory array having a plurality memory cells configured to store luminance data of the display device, and a luminance adjusting circuit configured to receive image data to be displayed on the display device. The luminance adjusting circuit is coupled directly to the non-volatile memory array to receive the luminance data of the display device from the non-volatile memory array and adjust the image data based on the luminance data of the display device.

公开(公告)号：US20210257014A1

公开(公告)日：2021-08-19

申请号：US17308675

申请日：2021-05-05

申请人： HEFEI RELIANCE MEMORY LIMITED

发明人： Zhichao LU ,  Liang ZHAO

IPC分类号： G11C11/22 ,  G06N5/04 ,  G11C11/56 ,  G06N3/06 ,  G11C11/4074

摘要： Dual-precision analog memory cells and arrays are provided. In some embodiments, a memory cell, comprises a non-volatile memory element having an input terminal and at least one output terminal; and a volatile memory element having a plurality of input terminals and an output terminal, wherein the output terminal of the volatile memory element is coupled to the input terminal of the non-volatile memory element, and wherein the volatile memory element comprises: a first transistor coupled between a first supply and a common node, and a second transistor coupled between a second supply and the common node; wherein the common node is coupled to the output terminal of the volatile memory element; and wherein gates of the first and second transistors are coupled to respective ones of the plurality of input terminals of the volatile memory element.

公开(公告)号：US20200274062A1

公开(公告)日：2020-08-27

申请号：US16789955

申请日：2020-02-13

申请人： HEFEI RELIANCE MEMORY LIMITED

发明人： Liang ZHAO ,  Zhichao LU

IPC分类号： H01L45/00 ,  H01L27/24

摘要： Thermal field controlled electrical conductivity change devices and applications therefore are provided. In some embodiments, a thermal switch, comprises: a metal-insulator-transition (MIT) material; first and second terminals electrically coupled to the MIT material; and a heater disposed near the MIT material.

公开(公告)号：US20190288037A1

公开(公告)日：2019-09-19

申请号：US16349255

申请日：2017-11-13

申请人： Hefei Reliance Memory Limited

发明人： Zhichao LU ,  Brent Steven HAUKNESS

IPC分类号： H01L27/24 ,  H01L45/00

摘要： Disclosed is a resistive random access memory (RRAM). The RRAM includes a bottom electrode made of tungsten and a switching layer made of hafnium oxide disposed above the bottom electrode, wherein the switching layer includes a switchable filament. The RRAM further includes a resistive layer disposed above the switching layer and a bit line disposed above the resistive layer, wherein the resistive layer extends laterally to connect two or more memory cells along the bit line.

公开(公告)号：US20230018760A1

公开(公告)日：2023-01-19

申请号：US17948712

申请日：2022-09-20

申请人： HEFEI RELIANCE MEMORY LIMITED

发明人： Liang ZHAO ,  Zhichao LU

IPC分类号： H01L45/00 ,  H01L27/24

摘要： Thermal field controlled electrical conductivity change devices and applications therefore are provided. In some embodiments, a thermal switch, comprises: a metal-insulator-transition (MIT) material; first and second terminals electrically coupled to the MIT material; and a heater disposed near the MIT material.

公开(公告)号：US20230012275A1

公开(公告)日：2023-01-12

申请号：US17948419

申请日：2022-09-20

申请人： Hefei Reliance Memory Limited

发明人： Zhichao LU ,  Brent HAUKNESS ,  Gary BRONNER

IPC分类号： G11C13/00 ,  G11C29/12

摘要： The embodiments herein describe technologies of initializing resistive memory devices (e.g., non-volatile and volatile memory devices). In one method, a first voltage is applied across a resistance change material of a memory cell to form an initial filament and multiple cycles are performed to condition the initial filament. Each of the multiple cycles includes: applying a second voltage with a first polarity across the resistance change material; and applying a third voltage with a second polarity across the resistance change material.

公开(公告)号：US20220093856A1

公开(公告)日：2022-03-24

申请号：US17540486

申请日：2021-12-02

申请人： HEFEI RELIANCE MEMORY LIMITED

发明人： Zhiqiang WEI ,  Zhichao LU

IPC分类号： H01L45/00 ,  H01L27/24 ,  G11C13/00

摘要： A non-volatile memory cell includes a bottom electrode, a top electrode having a conductive material, a resistive layer interposed between the bottom electrode and the top electrode, and side portions covering sides of the top electrode and the resistive layer. The side portions contain an oxide of the conductive material. The non-volatile memory cell further includes a contact wire disposed on the top electrode. A width of the contact wire is less than a width between lateral outer surfaces of the side portions.

公开(公告)号：US20210043256A1

公开(公告)日：2021-02-11

申请号：US17081092

申请日：2020-10-27

申请人： Hefei Reliance Memory Limited

发明人： Brent HAUKNESS ,  Zhichao LU

IPC分类号： G11C13/00 ,  G11C11/56

摘要： A method and related apparatus for using an indication of RRAM cell resistance to determine a write condition are disclosed. A cell characteristic of an RRAM cell may be determined to a higher bit resolution than a data read value. A write condition may be selected for the RRAM cell, based on the cell characteristic. The RRAM cell may be written to, using the selected write condition.

公开(公告)号：US20200372949A1

公开(公告)日：2020-11-26

申请号：US16876616

申请日：2020-05-18

申请人： HEFEI RELIANCE MEMORY LIMITED

发明人： Liang ZHAO ,  Zhichao LU

IPC分类号： G11C11/4094 ,  G11C11/408 ,  G11C11/4091 ,  G11C5/05 ,  G11C5/06 ,  G06F21/60

摘要： A non-volatile memory device includes a plurality of memory cells arranged in a matrix, a plurality of word lines extended in a row direction, and a plurality of bit lines extended in a column direction. Each of the memory cells is coupled to one of the word lines and one of the bit lines. The memory device further includes a word-line control circuit coupled to and configured to control the word lines, a first bit-line control circuit configured to control the bit lines and sense the memory cells in a digital mode, and a second bit-line control circuit configured to bias the bit lines and sense the memory cells in an analog mode. The first bit-line control circuit is coupled to a first end of each of the bit lines. The second bit-line control circuit is coupled to a second end of each of the bit lines.