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1.发明授权公开(公告)号：US06421820B1
公开(公告)日：2002-07-16
申请号：US09460034
申请日：1999-12-13
IPC分类号： G06F1750
CPC分类号： G03F1/36 , G03F7/70441
摘要： A semiconductor device can be fabricated using a photomask that has been modified using an assist feature design method (see e.g., FIG. 4A) based on normalized feature spacing. Before the device can be fabricated, a layout of original shapes is designed (402). For at least some of the original shapes, the width of the shape and a distance to at least one neighboring shape are measured (404). A modified shape can then be generated by moving edges of the original shape based on the width and distance measurements (406). This modification can be performed on some or all of the original shapes (408). For each of the modified shapes, a normalized space and correct number of assist features can be computed (410). The layout is then modified by adding the correct number of assist features in a space between the modified shape and the neighboring shape (412). This modified layout can then be used in producing a photomask, which can in turn be used to produce a semiconductor device.
摘要翻译： 可以使用已经基于归一化特征间隔使用辅助特征设计方法（参见例如图4A）修改的光掩模来制造半导体器件。 在可以制造设备之前，设计原始形状的布局（402）。 对于至少一些原始形状，测量形状的宽度和至少一个相邻形状的距离（404）。 然后可以通过基于宽度和距离测量来移动原始形状的边缘来生成修改的形状（406）。 可以对部分或全部原始形状执行该修改（408）。 对于每个修改的形状，可以计算归一化空间和正确数量的辅助特征（410）。 然后通过在修改的形状和相邻形状之间的空间中添加正确数量的辅助特征来修改布局（412）。 然后，该修改后的布局可用于制造光掩模，光掩模又可用于制造半导体器件。
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公开(公告)号：US20090053654A1
公开(公告)日：2009-02-26
申请号：US11841418
申请日：2007-08-20
IPC分类号： G03C5/00
CPC分类号： G03F1/30
摘要： A method for generating a mask pattern is provided. A target lithographic pattern comprising a plurality of first geometric regions is provided, wherein the regions between the plurality of first geometric regions comprise first spaces. The target lithographic pattern is transformed, and the transformed pattern is decomposed into a first pattern and a second pattern.
摘要翻译： 提供了一种用于产生掩模图案的方法。 提供包括多个第一几何区域的目标光刻图案，其中所述多个第一几何区域之间的区域包括第一空间。 目标光刻图案被变换，变换图案被分解为第一图案和第二图案。
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公开(公告)号：US07945869B2
公开(公告)日：2011-05-17
申请号：US11841418
申请日：2007-08-20
CPC分类号： G03F1/30
摘要： A method for generating a mask pattern is provided. A target lithographic pattern comprising a plurality of first geometric regions is provided, wherein the regions between the plurality of first geometric regions comprise first spaces. The target lithographic pattern is transformed, and the transformed pattern is decomposed into a first pattern and a second pattern.
摘要翻译： 提供了一种用于产生掩模图案的方法。 提供包括多个第一几何区域的目标光刻图案，其中所述多个第一几何区域之间的区域包括第一空间。 目标光刻图案被变换，变换图案被分解为第一图案和第二图案。
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公开(公告)号：US20120180006A1
公开(公告)日：2012-07-12
申请号：US12985643
申请日：2011-01-06
IPC分类号： G06F17/50
摘要： Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.
摘要翻译： 本发明的方面包括设计光掩模的计算机实现的方法。 在一个实施例中，该方法包括：使用第一光掩模设计来模拟第一光掩模图案化工艺以产生模拟轮廓; 将模拟轮廓与期望的设计进行比较; 识别不同于模拟轮廓和所需设计的区域; 在基于所识别的区域的第一光掩模图案化工艺之后，为第二光掩模图案化工艺创建期望的目标形状; 以及基于期望的目标形状提供用于形成第二光掩模设计的期望的目标形状。
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公开(公告)号：US08039203B2
公开(公告)日：2011-10-18
申请号：US12126741
申请日：2008-05-23
申请人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
发明人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
IPC分类号： H01L21/027
CPC分类号： H01L21/32139 , G03F1/36 , G03F1/70 , H01L21/0274 , H01L21/28123 , H01L21/823437 , Y10S438/942
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.
摘要翻译： 公开了集成电路及其制造和设计方法。 例如，制造方法包括在半导体衬底上沉积栅极材料，并且在栅极材料上沉积第一抗蚀剂层。 使用第一掩模来图案化第一抗蚀剂层以形成第一和第二抗蚀剂特征。 第一抗蚀剂特征包括半导体器件的栅极线的图案，第二抗蚀剂特征包括印刷辅助特征。 使用第二掩模形成抗蚀剂模板; 第二掩模移除第二抗蚀剂特征。
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公开(公告)号：US08365108B2
公开(公告)日：2013-01-29
申请号：US12985643
申请日：2011-01-06
摘要： Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.
摘要翻译： 本发明的方面包括设计光掩模的计算机实现的方法。 在一个实施例中，该方法包括：使用第一光掩模设计来模拟第一光掩模图案化工艺以产生模拟轮廓; 将模拟轮廓与期望的设计进行比较; 识别不同于模拟轮廓和所需设计的区域; 在基于所识别的区域的第一光掩模图案化工艺之后，为第二光掩模图案化工艺创建期望的目标形状; 以及基于期望的目标形状提供用于形成第二光掩模设计的期望的目标形状。
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公开(公告)号：US20090081563A1
公开(公告)日：2009-03-26
申请号：US12126741
申请日：2008-05-23
申请人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
发明人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
CPC分类号： H01L21/32139 , G03F1/36 , G03F1/70 , H01L21/0274 , H01L21/28123 , H01L21/823437 , Y10S438/942
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.
摘要翻译： 公开了集成电路及其制造和设计方法。 例如，制造方法包括在半导体衬底上沉积栅极材料，并且在栅极材料上沉积第一抗蚀剂层。 使用第一掩模来图案化第一抗蚀剂层以形成第一和第二抗蚀剂特征。 第一抗蚀剂特征包括半导体器件的栅极线的图案，第二抗蚀剂特征包括印刷辅助特征。 使用第二掩模形成抗蚀剂模板; 第二掩模移除第二抗蚀剂特征。
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公开(公告)号：US08161422B2
公开(公告)日：2012-04-17
申请号：US12349108
申请日：2009-01-06
IPC分类号： G06F17/50
摘要： A method is provided for modeling lithographic processes in the design of photomasks for the manufacture of semiconductor integrated circuits, and more particularly for simulating intermediate range flare effects. For a region of influence (ROI) from first ROI1 of about 5λ/NA to distance ROI2 when the point spread function has a slope that is slowly varying according to a predetermined criterion, then mask shapes at least within the distance range from ROI1 to ROI2 are smoothed prior to computing the SOCS convolutions. The method provides a fast method for simulating intermediate range flare effects with sufficient accuracy.
摘要翻译： 提供了一种用于在用于制造半导体集成电路的光掩模的设计中对光刻工艺进行建模的方法，更具体地说，用于模拟中间范围闪光效应。 对于当点扩散函数具有根据预定标准缓慢变化的斜率时，从约5λ/ NA的第一ROI1到距离ROI2的影响区域（ROI），则至少在从ROI1到ROI2的距离范围内的掩模形状 在计算SOCS卷积之前进行平滑处理。 该方法提供了一种用于以足够的精度模拟中等范围闪光效果的快速方法。
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公开(公告)号：US07642020B2
公开(公告)日：2010-01-05
申请号：US11465227
申请日：2006-08-17
申请人： Geng Han , Scott M. Mansfield
发明人： Geng Han , Scott M. Mansfield
IPC分类号： G03F9/00
CPC分类号： G03F7/70441 , G03F7/705
摘要： A methodology to improve the through-process model calibration accuracy of a semiconductor manufacturing process using lithographic methods by setting the correct defocus and image plane position in a patterning process model build. Separations of the optical model and the photoresist model are employed by separating out the adverse effects of the exposure tool from the effects of the photoresist. The exposure tool is adjusted to compensate for the errors. The methodology includes a determination of where the simulator best focus location is in comparison to the empirically derived best focus location.
摘要翻译： 一种通过在图案化过程模型构建中设置正确的散焦和图像平面位置来改进使用光刻方法的半导体制造工艺的过程模型校准精度的方法。 通过将曝光工具的不利影响与光致抗蚀剂的作用分离，可采用光学模型和光致抗蚀剂模型的分离。 调整曝光工具以补偿错误。 该方法包括确定模拟器最佳聚焦位置与经验派生的最佳聚焦位置相比较的位置。
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10.发明授权Verifying mask layout printability using simulation with adjustable accuracy 失效使用可调精度的模拟验证面具布局的可印刷性公开(公告)号：US07565633B2
公开(公告)日：2009-07-21
申请号：US11619320
申请日：2007-01-03
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A method, system and computer program product for verifying printability of a mask layout for a photolithographic process are disclosed. A simulation of the photolithographic process for the designed mask layout is simulated using a simplified version of the mask layout with a lower accuracy to generate a lower accuracy simulated image. Where the lower accuracy simulated image is determined as potentially including an error, a further simulation of the designated portion of the mask layout with a higher accuracy will be performed.
摘要翻译： 公开了一种用于验证光刻工艺的掩模布局的可印刷性的方法，系统和计算机程序产品。 使用精度较低的掩模布局的简化版本来模拟设计的掩模布局的光刻工艺的模拟，以产生较低精度的模拟图像。 在将低精度模拟图像确定为潜在地包括错误的情况下，将执行具有更高精度的掩模布局的指定部分的进一步模拟。
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