公开(公告)号：US07188135B2

公开(公告)日：2007-03-06

申请号：US10944470

申请日：2004-09-16

申请人： Hiroshi Takatori ,  James Little ,  Susumu Hara

发明人： Hiroshi Takatori ,  James Little ,  Susumu Hara

IPC分类号： G06G7/02 ,  G06F17/10

CPC分类号： H03H15/023

摘要： A finite impulse response filter having tap weight rotation is provided, where each tap has a corresponding coefficient selector. Each coefficient selector includes N coefficients, where N is the number of taps. Each coefficient selector provides one of its corresponding coefficients as an input to a multiplier. Each multiplier also receives an input from a triggered track and hold tap. The tap coefficients are selected according to the time delay since the corresponding track and hold tap was most recently triggered. In this manner, the tendency of multiplier gain nonuniformity to degrade filter operation in the presence of tap weight rotation is reduced. In another embodiment, an offset selector is provided, to reduce the tendency of component offsets to degrade filter operation in the presence of tap weight rotation.

摘要翻译： 提供了具有抽头权重旋转的有限脉冲响应滤波器，其中每个抽头具有对应的系数选择器。 每个系数选择器包括N个系数，其中N是抽头数。 每个系数选择器提供其相应系数之一作为乘法器的输入。 每个乘法器还从触发轨道接收输入并按住tap。 根据时间延迟选择抽头系数，因为相应的跟踪和保持分接头最近被触发。 以这种方式，在存在抽头重量旋转的情况下，乘法器增益不均匀性降低滤波器操作的趋势被减少。 在另一个实施例中，提供偏移选择器，以减少在存在抽头重量旋转时部件偏移降低过滤器操作的趋势。

公开(公告)号：US20050094722A1

公开(公告)日：2005-05-05

申请号：US10944470

申请日：2004-09-16

申请人： Hiroshi Takatori ,  James Little ,  Susumu Hara

发明人： Hiroshi Takatori ,  James Little ,  Susumu Hara

IPC分类号： G06F20060101 ,  H03H15/02 ,  H03K5/159

CPC分类号： H03H15/023

摘要： A finite impulse response filter having tap weight rotation is provided, where each tap has a corresponding coefficient selector. Each coefficient selector includes N coefficients, where N is the number of taps. Each coefficient selector provides one of its corresponding coefficients as an input to a multiplier. Each multiplier also receives an input from a triggered track and hold tap. The tap coefficients are selected according to the time delay since the corresponding track and hold tap was most recently triggered. In this manner, the tendency of multiplier gain nonuniformity to degrade filter operation in the presence of tap weight rotation is reduced. In another embodiment, an offset selector is provided, to reduce the tendency of component offsets to degrade filter operation in the presence of tap weight rotation.

摘要翻译： 提供了具有抽头权重旋转的有限脉冲响应滤波器，其中每个抽头具有对应的系数选择器。 每个系数选择器包括N个系数，其中N是抽头数。 每个系数选择器提供其相应系数之一作为乘法器的输入。 每个乘法器还从触发轨道接收输入并按住tap。 根据时间延迟选择抽头系数，因为相应的跟踪和保持分接头最近被触发。 以这种方式，在存在抽头重量旋转的情况下，乘法器增益不均匀性降低滤波器操作的趋势被减少。 在另一个实施例中，提供偏移选择器，以减少在存在抽头重量旋转时部件偏移降低过滤器操作的趋势。

公开(公告)号：US20050100083A1

公开(公告)日：2005-05-12

申请号：US10932931

申请日：2004-09-01

申请人： Hiroshi Takatori ,  James Little ,  Susumu Hara

发明人： Hiroshi Takatori ,  James Little ,  Susumu Hara

IPC分类号： H04B1/38 ,  H04L12/28 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18

CPC分类号： H04L12/2854 ,  H05K1/02 ,  H05K1/14 ,  H05K1/18

摘要： High speed data communication standards such as IEEE 802.3ae (also known as XAUI) use four lanes to transmit data half duplex at 10 Gb/s. In order to achieve full duplex, eight lanes need to be used. By introducing echo cancellers into the system, a high speed transceiver can be built with full duplex capability on four lanes, thereby saving 50% of the lane requirements when compared to XAUI while still maintaining a low symbol rate.

摘要翻译： 诸如IEEE 802.3ae（也称为XAUI）的高速数据通信标准使用四个通道以10Gb / s传输数据半双工。 为了实现全双工，需要使用8个通道。 通过在系统中引入回波消除器，可以在四个通道上建立具有全双工功能的高速收发器，从而与XAUI相比节省50％的通道要求，同时仍保持低符号率。

公开(公告)号：US08827491B2

公开(公告)日：2014-09-09

申请号：US13809744

申请日：2011-07-13

申请人： Hiroshi Takatori ,  Akinobu Seki ,  Noriyuki Kawahara

发明人： Hiroshi Takatori ,  Akinobu Seki ,  Noriyuki Kawahara

IPC分类号： F21V7/00 ,  F21V5/04 ,  G02B3/08 ,  F21S2/00 ,  F21Y101/02

CPC分类号： F21V7/0083 ,  F21S2/005 ,  F21V5/04 ,  F21V7/0091 ,  F21Y2115/10 ,  G02B3/08

摘要： A lighting device preventing an illumination variation on a surface to be irradiated. The lighting device has a first light emitting surface section (102a) which is a surface formed by rotating a bus with a central axis as a rotation axis in a first angle area (−θ1≦θ≦θ1) of an angle (θ) relative to a cross section of the bus which is an intersection line with the cross section perpendicular to a surface (801a) to be irradiated and including the central axis of a lighting lens (100), a second light emitting surface section (102b) formed in a second angle area (θ1≦θ≦180° and −180°≦θ≦−θ1) of the angle (θ) so that a light flux emitted toward the surface (801a) increases as compared with the case where the first light emitting surface section (102a) is formed in a whole-angle area (0°≦θ

摘要翻译： 一种防止被照射表面上的照明变化的照明装置。 照明装置具有第一发光表面部分（102a），该第一发光表面部分（102a）是通过使第一角度区域（ - ＆lt;＆lt; 1＆nlE;＆thetas;＆nlE;＆amp; thetas; 1）中的旋转轴线的中心轴线的总线旋转而形成的表面 相对于总线的横截面的角度（θ），其是与要照射的表面（801a）垂直的横截面的交点，并且包括照明透镜（100）的中心轴，第二发光 表面部分（102b）形成在角度（θ）的第二角度区域（θ; 1＆nlE;＆amp;;;; n1E; 180°和-180°＆nlE;; thetas; 1）中， 与第一发光面部（102a）形成在发光面部（102）上的全角度区域（0°＆lt; 1 |θ3; 360°）的情况相比，朝向表面（801a） 由第一发光表面部分（102a）和第二发光表面部分（102a）之间的步骤形成的第三发光表面部分（102c） d发光面部（102b）。

公开(公告)号：US20120076195A1

公开(公告)日：2012-03-29

申请号：US13312273

申请日：2011-12-06

申请人： Mark Joseph Callicotte ,  Hiroshi Takatori

发明人： Mark Joseph Callicotte ,  Hiroshi Takatori

IPC分类号： H03H7/30

CPC分类号： H03H21/0067 ,  H03H21/0001 ,  H03H21/0012

摘要： An adaptive transversal filter having tap weights Wj which are products of corresponding tap coefficients Cj and tap gains Mj is provided. A filter control loop controls all of the tap coefficients Cj such that an error signal derived from the filter output is minimized. One or more tap control loops controls a tap gain Mk such that the corresponding tap coefficient Ck satisfies a predetermined control condition. For example, |Ck| can be maximized subject to a constraint |Ck| Cmax, where Cmax is a predetermined maximum coefficient value. In this manner, the effect of quantization noise on the coefficients Cj can be reduced. Multiple tap control loops can be employed, one for each tap. Alternatively, a single tap control loop can be used to control multiple taps by time interleaving.

摘要翻译： 提供具有作为对应抽头系数Cj和抽头增益Mj的乘积的抽头权重Wj的自适应横向滤波器。 滤波器控制环控制所有抽头系数Cj，使得从滤波器输出得到的误差信号最小化。 一个或多个抽头控制回路控制抽头增益Mk使得对应的抽头系数Ck满足预定的控制条件。 例如| Ck | 可以最大限度地受限于| Ck | Cmax，其中Cmax是预定的最大系数值。 以这种方式，可以减小量化噪声对系数Cj的影响。 可以采用多个抽头控制回路，每个抽头一个。 或者，可以使用单抽头控制回路来通过时间交织来控制多个抽头。

公开(公告)号：US20090290622A1

公开(公告)日：2009-11-26

申请号：US12534643

申请日：2009-08-03

申请人： Hiroshi Takatori ,  Kenneth C. Dyer ,  Mark Callicotte

发明人： Hiroshi Takatori ,  Kenneth C. Dyer ,  Mark Callicotte

IPC分类号： H04B1/38

CPC分类号： H04B3/32 ,  H04B1/58

摘要： The present invention effectively cancels echo, near-end crosstalk and far-end crosstalk. A FEXT canceller is placed at the transmitter rather than at the receiver according to an aspect of the invention. In some embodiment, a FEXT canceller can be placed at the receiver only or the combination of both ends. The FEXT canceller is continuously adapted with information sent back from a remote receiver and with data from a neighbor transmitter that causes the crosstalk at the remote receiver. This allows the FEXT canceller to quickly adapt to a change in crosstalk function or conditions with the surrounding environment, for example, aging, temperature, humidity, physical pressure, etc. In some embodiments, an adaptation control signal is sent back from the receiver to the transmitter by using an overhead bit in the frame format. In some embodiments, part of the FEXT canceller is built-in at the remote receiver.

摘要翻译： 本发明有效地消除了回波，近端串扰和远端串扰。 根据本发明的一个方面，FEXT消除器被放置在发射器而不是接收器处。 在一些实施例中，FEXT消除器可以仅放置在接收器处或两端的组合。 FEXT消除器连续地适应从远程接收器发回的信息和来自邻近发射机的数据，这些数据导致远端接收机的串扰。 这允许FEXT消除器快速适应与周围环境（例如老化，温度，湿度，物理压力等）的串扰功能或条件的变化。在一些实施例中，自适应控制信号从接收器发送回 发送器通过使用帧格式的开销位。 在一些实施例中，FEXT消除器的一部分内置在远程接收器中。

公开(公告)号：US07035365B2

公开(公告)日：2006-04-25

申请号：US10001712

申请日：2002-03-11

申请人： Hiroshi Takatori ,  James M. Little ,  Scott Chiu

发明人： Hiroshi Takatori ,  James M. Little ,  Scott Chiu

IPC分类号： H04L7/00 ,  H04L7/02

CPC分类号： H04L1/205

摘要： A receiver involved in high-speed data transmission includes a decision system. The decision system calculates a value of an input signal and holds the value as a tentative value. The decision system calculates an error value, amplifies the error value, and holds the amplified error value as a corrected value. The decision system determines whether the amplified error value is within a marginal range. The decision system also determines whether adjacent values to the value indicate the input signal was in transition from a positive to negative state, or a negative to positive state. If the amplified error values is within a marginal range and the input signal was in transition from a positive to negative state, or a negative to positive state, then the decision system overrides the tentative value with the corrected value.

公开(公告)号：US20050094723A1

公开(公告)日：2005-05-05

申请号：US10954137

申请日：2004-09-28

申请人： Hiroshi Takatori

发明人： Hiroshi Takatori

IPC分类号： G06F20060101 ,  H03K5/159

CPC分类号： H03H17/0607 ,  H03H17/0227 ,  H03H17/06 ,  H03H21/0012 ,  H03H21/0067 ,  H03H2017/0297 ,  H03H2218/025 ,  H04L25/03057 ,  H04L25/03885 ,  H04L25/4921

摘要： Finite impulse response filters are commonly used in high speed data communications electronics for reducing error rates in multilevel symbol encoding schemes. Schemes such as pulse amplitude modulation and quadrature amplitude modulation may have higher error rates for symbols with low signal to noise ratios. By selectively updating the tap coefficients of the filter based on the symbols received, a more robust, accurate filter can be built.

摘要翻译： 有限脉冲响应滤波器通常用于高速数据通信电子设备中，用于降低多电平符号编码方案中的误码率。 诸如脉冲幅度调制和正交幅度调制的方案对于具有低信噪比的符号可能具有较高的误码率。 通过基于所接收的符号选择性地更新滤波器的抽头系数，可以构建更鲁棒，精确的滤波器。

公开(公告)号：US06707868B1

公开(公告)日：2004-03-16

申请号：US09291136

申请日：1999-04-12

申请人： John R. Camagna ,  James Ward Girardeau, Jr. ,  Stanley K. Ling ,  Hiroshi Takatori

发明人： John R. Camagna ,  James Ward Girardeau, Jr. ,  Stanley K. Ling ,  Hiroshi Takatori

IPC分类号： H04L700

CPC分类号： H04L7/0058 ,  H04L25/0202 ,  H04L2025/03471

摘要： A digital timing recovery system wherein the rate conversion is independent of the sampling rate, and which may be set in a network mode or a remote mode. The invention includes a transceiver core for processing transmit and receive data at a predetermined baud rate, an analog front end for transmitting and receiving analog signals over a network, a phase detector for generating a phase error estimate and a timing controller for receiving the phase error estimate signal and generating a receive and transmit phase control signal for controlling timing of the analog front end. A selector is provided for selecting a remote mode of operation or a network mode of operation. The analog front end further includes a transmit converter for converting the transmit data at the baud rate to a digital output at a transmit rate and a digital to analog converter for converting the digital output to an analog signal, and an analog to digital converter for converting the analog receive signal to a digital receive signal and a receive converter for converting the digital receive signal at a receive rate to the baud rate. The phase detector includes a channel estimator for generating a coefficient error signal and the timing controller includes a loop filter for producing a control signal for a numerically controlled oscillator that produces a baud interrupt signal and the phase control signals.

摘要翻译： 数字定时恢复系统，其中速率转换独立于采样速率，并且其可以被设置在网络模式或远程模式中。 本发明包括用于以预定波特率处理发送和接收数据的收发机核心，用于通过网络发送和接收模拟信号的模拟前端，用于产生相位误差估计的相位检测器和用于接收相位误差的定时控制器 估计信号并产生用于控制模拟前端的定时的接收和发送相位控制信号。 提供选择器用于选择远程操作模式或网络操作模式。 模拟前端还包括发送转换器，用于将波特率的发送数据以发送速率转换为数字输出，以及用于将数字输出转换为模拟信号的数模转换器，以及用于转换的模数转换器 到数字接收信号的模拟接收信号和用于以接收速率将数字接收信号转换成波特率的接收转换器。 相位检测器包括用于产生系数误差信号的信道估计器，并且定时控制器包括用于产生用于产生波特率中断信号和相位控制信号的数控振荡器的控制信号的环路滤波器。

公开(公告)号：US4687998A

公开(公告)日：1989-08-18

申请号：US759865

申请日：1985-07-29

申请人： Hiroshi Takatori ,  Toshiro Suzuki ,  Osamu Matsubara ,  Izuru Yamada

发明人： Hiroshi Takatori ,  Toshiro Suzuki ,  Osamu Matsubara ,  Izuru Yamada

IPC分类号： H03K4/02 ,  H03K5/04 ,  H03K5/22 ,  H03K5/159 ,  H03K5/00

CPC分类号： H03K4/023

摘要： A pulse generating circuit is provided for generating a pulse having a time width synchronized with an input pulse and corresponding to a reference voltage. The circuit is particularly designed not to be affected by parasitic capacitance. A circuit for charging one electrode of an integrating circuit with a constant current is controlled by turning on or off a switch in response to the input pulse. The other electrode of the integrating capacitor is connected with a reference voltage source by driving a switch in response to a pulse having a pulse width which contains the time period of the input pulse and which is wider than the input pulse. A comparator is provided for comparing the potential at one electrode of the integrating capacitor and ground potential. A desired pulse is generated by a logic circuit which is receives both the output of the comparator and the input pulse.