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    Semiconductor integrated circuit device and process for manufacturing the same
    2.
    发明申请
    Semiconductor integrated circuit device and process for manufacturing the same 有权
    半导体集成电路器件及其制造方法

    公开(公告)号：US20020022357A1

    公开(公告)日：2002-02-21

    申请号：US09923406

    申请日：2001-08-08

    申请人： Hitachi, Ltd.

    发明人： Shinpei Iijima ,  Yuzuru Ohji ,  Masato Kunitomo ,  Masahiko Hiratani ,  Yuichi Matsui ,  Hiroyuki Ohta ,  Yukihiro Kumagai

    IPC分类号： H01L021/4763

    CPC分类号： H01L21/02183 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02356 ,  H01L21/31637 ,  H01L27/10814 ,  H01L27/10855 ,  H01L28/60 ,  H01L28/91

    摘要： A disadvantage upon heat treatment in an oxygen atmosphere of a dielectric film formed on a lower electrode of capacitance device of DRAM that oxygen permeating the lower electrode oxidizes a barrier layer to form an oxide layer of high resistance and low dielectric constant is prevented. An Ru silicide layer is formed on the surface of a plug in a through hole formed below a lower electrode for an information storage capacitance device C and an Ru silicon nitride layer is formed further on the surface of the Ru silicide layer. Upon high temperature heat treatment in an oxygen atmosphere conducted in the step of forming a dielectric film on the lower electrode, the Ru silicon nitride layer is oxidized sacrificially into an Ru silicon oxynitride to prevent progress of oxidation in the Ru silicide layer.

    摘要翻译： 形成在DRAM的电容元件的下部电极上形成的电介质膜的氧气氛中的氧气的缺点是氧气渗透下部电极氧化阻挡层以形成高电阻和低介电常数的氧化物层。 在形成在信息容纳电容元件C的下部电极下方的通孔中的插塞表面上形成Ru Ru硅化物层，并且在Ru硅化物层的表面上进一步形成Ru氮化硅层。 在下电极上形成电介质膜的步骤中进行的氧气氛中进行高温热处理时，将Ru氮化硅层牺牲性氧化为Ru氮氧化硅，以防止Ru化硅化物层的氧化进行。

    Semiconductor integrated circuit device and manufacturing method thereof
    3.
    发明申请
    Semiconductor integrated circuit device and manufacturing method thereof 审中-公开
    半导体集成电路器件及其制造方法

    公开(公告)号：US20030173614A1

    公开(公告)日：2003-09-18

    申请号：US10352133

    申请日：2003-01-28

    申请人： Hitachi, Ltd.

    发明人： Yoshitaka Nakamura ,  Isamu Asano ,  Shinpei Iijima ,  Masahiko Hiratani ,  Hiroshi Sakuma

    IPC分类号： H01L029/76 ,  H01L029/94 ,  H01L027/108 ,  H01L021/8242 ,  H01L031/119

    CPC分类号： H01L28/40 ,  H01L21/02183 ,  H01L21/02271 ,  H01L21/02337 ,  H01L21/02356 ,  H01L21/31604 ,  H01L21/31637 ,  H01L27/10814 ,  H01L27/10882 ,  H01L27/10894 ,  H01L27/11502 ,  H01L27/11507 ,  H01L28/60 ,  H01L28/65

    摘要： Disclosed are a semiconductor integrated circuit device and a method of manufacturing the same capable of improving the characteristics of the semiconductor integrated circuit device by reducing a leakage current of a capacitor used in a DRAM memory cell. A data storage capacitor connected to a data transfer MISFET in a memory cell forming area via plugs is formed in the following manner. That is, a lower electrode composed of an Ru film is formed in a hole in a silicon oxide film, and then, a tantalum oxide film is deposited on the lower electrode. Thereafter, a first thermal treatment in an oxidizing atmosphere is performed to the film at a temperature sufficient to repair an oxygen defect and having no influence on the materials below the tantalum oxide film. Further, a second thermal treatment in an inactive atmosphere is performed at a temperature at which the tantalum oxide film is not completely crystallized (650null C.) and higher than that applied in the later process. Thereafter, an upper electrode composed of a laminated film of an Ru film and a W film is formed on the capacitor insulating film made from the tantalum oxide film.

    摘要翻译： 公开了一种半导体集成电路器件及其制造方法，其能够通过减少DRAM存储单元中使用的电容器的漏电流来改善半导体集成电路器件的特性。 以下述方式形成经由插头与存储单元形成区域中的数据传输MISFET连接的数据存储电容器。 也就是说，在氧化硅膜的孔中形成由Ru膜构成的下电极，然后在下电极上沉积氧化钽膜。 此后，在足以修复氧缺陷并且对钽氧化物膜下方的材料没有影响的温度下，对膜进行氧化气氛中的第一热处理。 此外，在不活化气氛中的第二热处理在氧化钽膜未完全结晶（650℃）的温度下进行，并且高于后续工艺中所应用的温度。 此后，在由氧化钽膜制成的电容器绝缘膜上形成由Ru膜和W膜的叠层膜构成的上电极。

    Semiconductor integrated circuit device and method of manufacturing the same
    4.
    发明申请
    Semiconductor integrated circuit device and method of manufacturing the same 失效

    公开(公告)号：US20030132462A1

    公开(公告)日：2003-07-17

    申请号：US10353953

    申请日：2003-01-30

    申请人： Hitachi, Ltd.

    发明人： Shinpei Iijima ,  Hiroshi Sakuma

    IPC分类号： H01L029/76

    CPC分类号： H01L28/60 ,  H01L21/28518 ,  H01L27/10814 ,  H01L28/55 ,  H01L28/91

    摘要： In a semiconductor integrated circuit device according to the present invention, a polycrystalline silicon film is formed along an inner wall of a trench in which a capacitor is to be formed, and the polycrystalline silicon film and a lower electrode is contacted to each other on the entire inner wall of the trench. Therefore, oxygen permeated into the lower electrode at the time of a thermal treatment of a tantalum oxide film is consumed at an interface between the polycrystalline silicon film and the lower electrode. Thus, the oxygen does not reach the surface of the plug, so that such a disadvantage can be prevented that the oxygen permeated through the lower electrode causes the oxidation on the surface of the silicon plug below the lower electrode to form a high-resistance oxide layer when a dielectric film formed on a lower electrode of a capacitor of a DRAM is subjected to a thermal treatment in an oxygen atmosphere.

    Semiconductor integrated circuit device and method of manufacturing the same
    6.
    发明申请
    Semiconductor integrated circuit device and method of manufacturing the same 失效
    半导体集成电路器件及其制造方法

    公开(公告)号：US20030045067A1

    公开(公告)日：2003-03-06

    申请号：US10230107

    申请日：2002-08-29

    申请人： Hitachi, Ltd.

    发明人： Shinpei Iijima ,  Hiroshi Sakuma

    IPC分类号： H01L021/8242 ,  H01L021/20

    CPC分类号： H01L28/60 ,  H01L21/28518 ,  H01L27/10814 ,  H01L28/55 ,  H01L28/91

    摘要： In a semiconductor integrated circuit device according to the present invention, a polycrystalline silicon film is formed along an inner wall of a trench in which a capacitor is to be formed, and the polycrystalline silicon film and a lower electrode is contacted to each other on the entire inner wall of the trench. Therefore, oxygen permeated into the lower electrode at the time of a thermal treatment of a tantalum oxide film is consumed at an interface between the polycrystalline silicon film and the lower electrode. Thus, the oxygen does not reach the surface of the plug, so that such a disadvantage can be prevented that the oxygen permeated through the lower electrode causes the oxidation on the surface of the silicon plug below the lower electrode to form a high-resistance oxide layer when a dielectric film formed on a lower electrode of a capacitor of a DRAM is subjected to a thermal treatment in an oxygen atmosphere.

    摘要翻译： 在根据本发明的半导体集成电路器件中，沿着要形成电容器的沟槽的内壁形成多晶硅膜，并且多晶硅膜和下电极在 整个内壁的沟槽。 因此，在多晶硅膜和下电极之间的界面处消耗氧化钽膜的热处理时渗透到下电极中的氧。 因此，氧没有到达插塞的表面，因此可以防止透过下电极的氧气导致在下电极下方的硅插塞表面上的氧化形成高电阻氧化物 当形成在DRAM的电容器的下电极上的电介质膜在氧气氛中进行热处理时，层。