Systems and methods for mura calibration preparation
    2.
    发明授权
    Systems and methods for mura calibration preparation 有权
    mura校准准备的系统和方法

    公开(公告)号:US09519164B2

    公开(公告)日:2016-12-13

    申请号:US13601529

    申请日:2012-08-31

    摘要: Systems and methods for calibrating an electronic display to reduce or eliminate artifacts are provided. One method for reducing or eliminating artifacts may involve baking the operational—but not yet fully calibrated—electronic display to reduce stray charge on the electronic display. After baking the display, the electronic display may be calibrated to reduce or eliminate flicker and/or mura artifacts

    摘要翻译: 提供了用于校准电子显示器以减少或消除伪影的系统和方法。 用于减少或消除伪像的一种方法可能包括烘烤操作但尚未完全校准的电子显示器以减少电子显示器上的杂散电荷。 在烘烤显示器之后,可以校准电子显示器以减少或消除闪烁和/或凹陷伪影

    Systems and methods for dynamic dwelling time for tuning display to reduce or eliminate mura artifact
    4.
    发明授权
    Systems and methods for dynamic dwelling time for tuning display to reduce or eliminate mura artifact 有权
    用于调整显示的动态住宅时间的系统和方法,以减少或消除mura伪影

    公开(公告)号:US08988471B2

    公开(公告)日:2015-03-24

    申请号:US13601801

    申请日:2012-08-31

    IPC分类号: G09G5/10

    摘要: Systems and methods for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve turning on an electronic display and programming pixels the electronic display to a uniform gray level. An initial luminance value may be determined and, after waiting a period of time, a subsequent luminance of the pixels may be measured. When a difference between the subsequent luminance and initial luminance is within a threshold, the mura artifact may be understood to have settled and the electronic display may be calibrated.

    摘要翻译: 提供了用于校准电子显示器以减少或消除mura伪影的系统和方法。 该mura伪影可能是由于电子显示器中的公共电压层(VCOM)的差异行为。 用于减少或消除凹陷假象的一种方法可以包括打开电子显示器并将电子显示器的像素编程为均匀的灰度级。 可以确定初始亮度值,并且在等待一段时间之后,可以测量像素的后续亮度。 当随后的亮度和初始亮度之间的差在阈值以内时,可以理解到mura伪影已经确定并且可以校准电子显示器。

    Systems and Methods for Dynamic Dwelling Time for Tuning Display to Reduce or Eliminate Mura Artifact
    5.
    发明申请
    Systems and Methods for Dynamic Dwelling Time for Tuning Display to Reduce or Eliminate Mura Artifact 有权
    动态停留时间的系统和方法用于调整显示以减少或消除Mura人工制品

    公开(公告)号:US20130329057A1

    公开(公告)日:2013-12-12

    申请号:US13601801

    申请日:2012-08-31

    IPC分类号: H04N17/00 H01R43/00 G09G5/10

    摘要: Systems and methods for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve turning on an electronic display and programming pixels the electronic display to a uniform gray level. An initial luminance value may be determined and, after waiting a period of time, a subsequent luminance of the pixels may be measured. When a difference between the subsequent luminance and initial luminance is within a threshold, the mura artifact may be understood to have settled and the electronic display may be calibrated.

    摘要翻译: 提供了用于校准电子显示器以减少或消除mura伪影的系统和方法。 该mura伪影可能是由于电子显示器中的公共电压层(VCOM)的差异行为。 用于减少或消除凹陷假象的一种方法可以包括打开电子显示器并将电子显示器的像素编程为均匀的灰度级。 可以确定初始亮度值,并且在等待一段时间之后,可以测量像素的后续亮度。 当随后的亮度和初始亮度之间的差在阈值以内时,可以理解到mura伪影已经确定并且可以校准电子显示器。

    Offsetting multiple coupling effects in display screens
    7.
    发明授权
    Offsetting multiple coupling effects in display screens 有权
    抵消显示屏幕中的多个耦合效应

    公开(公告)号:US08502842B2

    公开(公告)日:2013-08-06

    申请号:US13143189

    申请日:2011-05-24

    申请人: Hopil Bae

    发明人: Hopil Bae

    IPC分类号: G09G5/10

    摘要: Design criteria of display screens is provided that can be used in combination with particular inversion schemes and scanning orders of the display screens to reduce or eliminate visual artifacts that can be caused by the effects of capacitive coupling of voltage changes in one part of the display into other parts of the display. Using particular combinations of inversion schemes and scanning orders, together with particular design criteria for the display screen, can allow one type of effect, e.g., an increase or decrease in a brightness of a display pixel, caused by one type of coupling effect, such as a coupling between data lines, can be offset by the effect caused by another type of coupling effect, such as a coupling between pixel electrodes.

    摘要翻译: 提供了显示屏幕的设计标准,其可以与特定的反转方案和显示屏幕的扫描顺序组合使用,以减少或消除可能由显示器的一部分中的电压变化的电容耦合的影响引起的视觉伪影 其他部分的显示。 使用反演方案和扫描顺序的特定组合以及显示屏幕的特定设计标准,可以允许一种类型的效果,例如由一种类型的耦合效应引起的显示像素的亮度的增加或减少,例如 作为数据线之间的耦合,可以通过由像素电极之间的耦合的另一种类型的耦合效应引起的效应来抵消。

    ADDITIONAL APPLICATION OF VOLTAGE DURING A WRITE SEQUENCE
    8.
    发明申请
    ADDITIONAL APPLICATION OF VOLTAGE DURING A WRITE SEQUENCE 有权
    在写入序列期间额外的电压应用

    公开(公告)号:US20120299971A1

    公开(公告)日:2012-11-29

    申请号:US13143184

    申请日:2011-05-24

    摘要: With respect to liquid crystal display inversion schemes, a large change in voltage on a data line can affect the voltages on adjacent data lines due to capacitive coupling between data lines. The resulting change in voltage on these adjacent data lines can give rise to visual artifacts in the data lines' corresponding sub-pixels. Various embodiments of the present disclosure serve to prevent or reduce these visual artifacts by applying voltage to a data line more than once during the write sequence. Doing so can allow erroneous brightening or darkening caused by large voltage swings to be overwritten without causing additional large voltage swings on the data line.

    摘要翻译: 对于液晶显示反转方案,由于数据线之间的电容耦合,数据线上的电压变化很大可能影响相邻数据线上的电压。 由此产生的这些相邻数据线上的电压变化可能引起数据线对应子像素中的视觉伪像。 本公开的各种实施例用于通过在写入序列期间多次施加电压到数据线来防止或减少这些视觉伪影。 这样做可能会导致由于电压波动较大引起的错误增白或变暗而不会在数据线上造成额外的大电压摆幅。

    PRE-CHARGING OF SUB-PIXELS
    9.
    发明申请
    PRE-CHARGING OF SUB-PIXELS 有权
    子像素预先充电

    公开(公告)号:US20120299894A1

    公开(公告)日:2012-11-29

    申请号:US13143188

    申请日:2011-05-24

    IPC分类号: G09G5/00

    摘要: Pre-charging display screen sub-pixels, such as aggressor sub-pixels, prior to the application of a target data voltage to the aggressor sub-pixels is provided. In some examples, a target voltage of a sub-pixel in a previous row in the scanning order of the display can be used to pre-charge sub-pixels. The row of sub-pixels to be pre-charged can be switched on during the updating of another row of sub-pixels. In this way, for example, target voltages applied to data lines while an update row is connected to the data lines, e.g., to update the update row, can be applied to the row to be pre-charged as well.

    摘要翻译: 提供了在将目标数据电压施加到侵略者子像素之前的预充电显示屏幕子像素(例如侵略者子像素)。 在一些示例中,可以使用显示器的扫描顺序中的前一行中的子像素的目标电压来对子像素进行预充电。 在更新另一行子像素行期间,可以将要预充电的子像素行接通。 以这种方式,例如,当更新行连接到数据线,例如更新更新行时,施加到数据线的目标电压也可以应用于要预充电的行。

    COLUMN INVERSION TECHNIQUES FOR IMPROVED TRANSMITTANCE
    10.
    发明申请
    COLUMN INVERSION TECHNIQUES FOR IMPROVED TRANSMITTANCE 有权
    用于改进传输的列反转技术

    公开(公告)号:US20120113154A1

    公开(公告)日:2012-05-10

    申请号:US12941751

    申请日:2010-11-08

    IPC分类号: G09G3/36 G09G5/10 G09G5/00

    摘要: Present techniques involve methods and systems of inversion patterns for pixels in a display. Inversion techniques involve driving image signals having a first polarity to data lines of a pixel matrix during a first time period and driving image signals having an opposite polarity to the data lines during a second time period. In some embodiments, the pixels may be configured to have electrodes having only two finger electrodes, thus widening the distance between electrodes and decreasing the susceptibility for crosstalk between pixels. In some embodiments, horizontal cross-talk of electromagnetic fields between pixels may be further reduced by configuring the data line driving scheme such that voltage polarity is flipped for the pixels along every two, three, or more data line columns. Furthermore, a Z inversion pattern may be employed to reduce the occurrence of undesirable display artifacts.

    摘要翻译: 现有技术涉及显示器中像素的反演图案的方法和系统。 反转技术涉及在第一时间段期间驱动具有第一极性的图像信号到像素矩阵的数据线,并且在第二时间段期间驱动与数据线具有相反极性的图像信号。 在一些实施例中,像素可以被配置为具有仅具有两个指状电极的电极,从而加宽电极之间的距离并降低像素之间的串扰的敏感度。 在一些实施例中,可以通过配置数据线驱动方案来进一步减少像素之间的电磁场的水平串扰,使得沿着每两个,三个或更多个数据线列的像素翻转电压极性。 此外,可以采用Z反转图案来减少不期望的显示伪影的发生。