公开(公告)号：US20090189246A1

公开(公告)日：2009-07-30

申请号：US12178154

申请日：2008-07-23

申请人： Hsiao-Che WU ,  Ming-Yen LI ,  Wen-Li TSAI

发明人： Hsiao-Che WU ,  Ming-Yen LI ,  Wen-Li TSAI

IPC分类号： H01L21/762 ,  H01L23/58

CPC分类号： H01L21/76224

摘要： A method for forming a trench isolation structure and a semiconductor device are provided. The method comprises the following steps: forming a patterned mask on a semiconductor substrate; defining a trench with a predetermined depth D by using the patterned mask, wherein the trench has a bottom and a side wall; forming a liner layer covering the bottom and the side wall of the trench; substantially filling the trench with a flowable oxide from the bottom to a thickness d1 to form an oxide layer; forming a barrier layer with a thickness d′ to cover and completely seal the surface of the oxide layer, wherein d′

摘要翻译： 提供了一种用于形成沟槽隔离结构和半导体器件的方法。 该方法包括以下步骤：在半导体衬底上形成图案化掩模; 通过使用图案化掩模来限定具有预定深度D的沟槽，其中沟槽具有底部和侧壁; 形成覆盖所述沟槽的底部和侧壁的衬里层; 用从底部到厚度d1的可流动氧化物基本上填充沟槽以形成氧化物层; 形成厚度d'的阻挡层以覆盖并完全密封氧化物层的表面，其中d'

公开(公告)号：US20090061635A1

公开(公告)日：2009-03-05

申请号：US12108285

申请日：2008-04-23

申请人： Hsiao-Che WU ,  Ming-Yen Li ,  Wen-Li Tsai

发明人： Hsiao-Che WU ,  Ming-Yen Li ,  Wen-Li Tsai

IPC分类号： H01L21/311

CPC分类号： H01L21/0337

摘要： A method for forming micro-patterns is disclosed. The method forms a sacrificial layer and a mask layer. A plurality of first taper trenches is formed in the sacrificial layer. A photoresist layer is filled in the plurality of first taper trenches. The photoresist layer is used as a mask and a plurality of second taper trenches is formed in the sacrificial layer. Then, the photoresist layer is stripped to be capable of patterning a layer by the first taper trenches and the second taper trenches in the sacrificial layer. Therefore, a patterned sacrificial layer duplicating the line density by double etching is formed.

摘要翻译： 公开了一种形成微图案的方法。 该方法形成牺牲层和掩模层。 在牺牲层中形成多个第一锥形沟槽。 在多个第一锥形沟槽中填充光致抗蚀剂层。 光致抗蚀剂层用作掩模，并且在牺牲层中形成多个第二锥形沟槽。 然后，剥离光致抗蚀剂层以能够通过第一锥形沟槽和牺牲层中的第二锥形沟槽图案化层。 因此，形成通过双蚀刻复制线密度的图案化牺牲层。

公开(公告)号：US20090023268A1

公开(公告)日：2009-01-22

申请号：US12108306

申请日：2008-04-23

申请人： Hsiao-Che WU ,  Ming-Yen Li ,  Wen-Li Tsai

发明人： Hsiao-Che WU ,  Ming-Yen Li ,  Wen-Li Tsai

IPC分类号： H01L21/762

CPC分类号： H01L21/76205 ,  H01L21/823878

摘要： An isolation method of active area for semiconductor forms an isolated active area in a substrate. The substrate is a p-type silicon substrate. A pad oxide layer is formed on the substrate. A patterned sacrificial layer and an upper mask layer are formed on the pad oxide layer, where the upper mask layer is formed over the isolation region of the substrate. A gap is formed between the patterned sacrificial layer and the upper mask layer. An implantation process is performed to dope ions into the substrate through the gap, which forms an n-type barrier to surround the active areas. Lastly, the patterned sacrificial layer is stripped, and an anodization process is utilized to convert p-type bulk silicon into porous silicon. Then, an oxidation process is performed to oxidize the porous silicon to form a silicon dioxide isolation region for the active areas.

摘要翻译： 用于半导体的有源区的隔离方法在衬底中形成隔离的有源区。 衬底是p型硅衬底。 衬底氧化层形成在衬底上。 在衬垫氧化物层上形成图案化牺牲层和上掩模层，其中上掩模层形成在衬底的隔离区上。 在图案化的牺牲层和上掩模层之间形成间隙。 进行注入工艺以通过间隙将离子掺杂到衬底中，其形成围绕有源区的n型势垒。 最后，剥离图案化的牺牲层，并且使用阳极氧化工艺将p型体硅转化为多孔硅。 然后，进行氧化处理以氧化多孔硅以形成活性区的二氧化硅隔离区。