公开(公告)号：US07715241B2

公开(公告)日：2010-05-11

申请号：US12056288

申请日：2008-03-27

申请人： Hsin-Ming Chen ,  Shih-Chen Wang ,  Sheng-Yu Wang ,  Cheng-Yen Shen

发明人： Hsin-Ming Chen ,  Shih-Chen Wang ,  Sheng-Yu Wang ,  Cheng-Yen Shen

IPC分类号： G11C16/04

CPC分类号： G11C16/0466 ,  G11C16/14

摘要： A present invention relates to a method of erasing a P-channel non-volatile memory is provided. This P-channel non-volatile memory includes a select transistor and a memory cell connected in series and disposed on a substrate. In the method of erasing the P-channel non-volatile memory, holes are injected into a charge storage structure by substrate hole injection effect. Hence, the applied operational voltage is low, so the power consumption is lowered, and the efficiency of erasing is enhanced. As a result, an operational speed of the memory is accelerated, and the reliability of the memory is improved.

摘要翻译： 本发明涉及一种擦除P信道非易失性存储器的方法。 该P沟道非易失性存储器包括选择晶体管和串联连接并设置在基板上的存储单元。 在擦除P沟道非易失性存储器的方法中，通过衬底空穴注入效应将空穴注入电荷存储结构。 因此，施加的工作电压低，因此功耗降低，并且提高了擦除效率。 结果，加速了存储器的操作速度，并提高了存储器的可靠性。

公开(公告)号：US20090244985A1

公开(公告)日：2009-10-01

申请号：US12056288

申请日：2008-03-27

申请人： Hsin-Ming Chen ,  Shih-Chen Wang ,  Sheng-Yu Wang ,  Cheng-Yen Shen

发明人： Hsin-Ming Chen ,  Shih-Chen Wang ,  Sheng-Yu Wang ,  Cheng-Yen Shen

IPC分类号： G11C16/16

CPC分类号： G11C16/0466 ,  G11C16/14

摘要： A present invention relates to a method of erasing a P-channel non-volatile memory is provided. This P-channel non-volatile memory includes a select transistor and a memory cell connected in series and disposed on a substrate. In the method of erasing the P-channel non-volatile memory, holes are injected into a charge storage structure by substrate hole injection effect. Hence, the applied operational voltage is low, so the power consumption is lowered, and the efficiency of erasing is enhanced. As a result, an operational speed of the memory is accelerated, and the reliability of the memory is improved.

摘要翻译： 本发明涉及一种擦除P信道非易失性存储器的方法。 该P沟道非易失性存储器包括选择晶体管和串联连接并设置在基板上的存储单元。 在擦除P沟道非易失性存储器的方法中，通过衬底空穴注入效应将空穴注入电荷存储结构。 因此，施加的工作电压低，因此功耗降低，并且提高了擦除效率。 结果，加速了存储器的操作速度，并提高了存储器的可靠性。

公开(公告)号：US20140073126A1

公开(公告)日：2014-03-13

申请号：US13610875

申请日：2012-09-12

申请人： Cheng-Yen Shen ,  Wein-Town Sun

发明人： Cheng-Yen Shen ,  Wein-Town Sun

IPC分类号： H01L21/28

CPC分类号： H01L27/11573 ,  H01L21/28273 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/82385 ,  H01L21/823857 ,  H01L27/11529 ,  H01L27/11546

摘要： A method of manufacturing a non-volatile memory is provided. A substrate includes a memory cell region and a first periphery circuit region. The memory cell region includes a select transistor region. A first gate dielectric layer having a first thickness is formed on the substrate in the first periphery circuit region and the select transistor region. A portion of the first gate dielectric layer on the select transistor region is removed to form a second gate dielectric layer. The second dielectric layer has a second thickness, wherein the second thickness is less than the first thickness.

摘要翻译： 提供一种制造非易失性存储器的方法。 衬底包括存储单元区域和第一外围电路区域。 存储单元区域包括选择晶体管区域。 在第一外围电路区域和选择晶体管区域的基板上形成具有第一厚度的第一栅极介质层。 去除选择晶体管区域上的第一栅极电介质层的一部分以形成第二栅极介电层。 第二介电层具有第二厚度，其中第二厚度小于第一厚度。

公开(公告)号：US08822319B2

公开(公告)日：2014-09-02

申请号：US13610875

申请日：2012-09-12

申请人： Cheng-Yen Shen ,  Wein-Town Sun

发明人： Cheng-Yen Shen ,  Wein-Town Sun

IPC分类号： H01L21/28

CPC分类号： H01L27/11573 ,  H01L21/28273 ,  H01L21/823456 ,  H01L21/823462 ,  H01L21/82385 ,  H01L21/823857 ,  H01L27/11529 ,  H01L27/11546

摘要： A method of manufacturing a non-volatile memory is provided. A substrate includes a memory cell region and a first periphery circuit region. The memory cell region includes a select transistor region. A first gate dielectric layer having a first thickness is formed on the substrate in the first periphery circuit region and the select transistor region. A portion of the first gate dielectric layer on the select transistor region is removed to form a second gate dielectric layer. The second dielectric layer has a second thickness, wherein the second thickness is less than the first thickness.

摘要翻译： 提供一种制造非易失性存储器的方法。 衬底包括存储单元区域和第一外围电路区域。 存储单元区域包括选择晶体管区域。 在第一外围电路区域和选择晶体管区域的基板上形成具有第一厚度的第一栅极介质层。 去除选择晶体管区域上的第一栅极电介质层的一部分以形成第二栅极介电层。 第二介电层具有第二厚度，其中第二厚度小于第一厚度。