Computer subsystem and computer system with composite nodes in an interconnection structure

    公开(公告)号:US10409766B2

    公开(公告)日:2019-09-10

    申请号:US15845450

    申请日:2017-12-18

    Abstract: A computer subsystem and a computer system, where the computer subsystem includes L composite nodes (CNs), each CN includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller (NC). Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the NC in the basic node. The NC in each basic node has a routing function. Any two NCs in the M basic nodes are interconnected. A connection between the L CNs formed through connections between NCs enables communication between any two NCs to be no more than three hops. Hence, the computer subsystem and the computer system can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

    Directory maintenance method and apparatus

    公开(公告)号:US10204052B2

    公开(公告)日:2019-02-12

    申请号:US14635163

    申请日:2015-03-02

    Abstract: A directory maintenance method and apparatus are provided. The method includes sending, by a main memory according to a correspondence between a cache line in a directory and a cache, listening information to each cache corresponding to a cache line at a preset frequency; receiving, by each cache corresponding to the cache line, the listening information, and sending a listening response according to the listening information; and receiving, by the main memory, the listening response, and updating the directory according to the listening response, where the listening response includes a state of the cache line in the cache sending the listening response. The directory maintenance method and apparatus that are disclosed in the present invention can lower an impact of listening caused due to replacement on normal processing of a processor, and reduce degradation of system performance.

    Memory Data Access Method and Apparatus, and System
    3.
    发明申请
    Memory Data Access Method and Apparatus, and System 审中-公开
    存储器数据存取方法与装置及系统

    公开(公告)号:US20150189039A1

    公开(公告)日:2015-07-02

    申请号:US14581577

    申请日:2014-12-23

    Abstract: A memory data access method and apparatus, and a system are provided. In the embodiments of the present invention, when it is determined, according to a preset rule, that memory data located on a remote node needs to be frequently accessed, the memory data located on the remote node is replicated to a memory of a local node, and then the memory data located on the remote node is accessed from the memory of the local node. Because a delay of accessing a memory of a processor in a local node is much less than a delay of accessing a memory of a remote processor, when memory data located on a remote node needs to be frequently accessed, a delay of reading the memory data located on the remote node may be significantly reduced by using the solution, thereby improving system performance.

    Abstract translation: 提供存储器数据存取方法和装置,以及系统。 在本发明的实施例中,当根据预设规则确定需要频繁地访问位于远程节点上的存储器数据时,位于远程节点上的存储器数据被复制到本地节点的存储器 ,然后从本地节点的存储器访问位于远程节点上的存储器数据。 因为访问本地节点中的处理器的存储器的延迟远远小于访问远程处理器的存储器的延迟,所以当位于远程节点上的存储器数据需要被频繁访问时,读取存储器数据的延迟 通过使用该解决方案可以显着地减少位于远程节点上,从而提高系统性能。

    Directory processing method and apparatus, and storage system

    公开(公告)号:US11372759B2

    公开(公告)日:2022-06-28

    申请号:US16932318

    申请日:2020-07-17

    Abstract: A directory processing method and apparatus are provided to resolve a problem that a directory occupies a relatively large quantity of caches in an existing directory processing solution. The method includes: receiving, by a first data node, a first request sent by a second data node; searching for, by the first data node, a matched directory entry in a directory of the first data node based on tag information and index information in a first physical address; creating, when no matched directory entry is found, a first directory entry of the directory based on the first request, where the first directory entry includes the tag information, first indication information, first pointer information, and first status information, the first pointer information is used to indicate that data in the memory address corresponding to the indication bit that is set to valid is read by the second data node.

    Cache coherence management method and node controller

    公开(公告)号:US10691601B2

    公开(公告)日:2020-06-23

    申请号:US16165709

    申请日:2018-10-19

    Abstract: A cache coherence management method, a node controller, and a multiprocessor system that includes a first table, a second table, a node controller, and at least two nodes, where the node controller determines, in the first table according to address information of data, a first entry, where the first entry includes a first field and a second field. The first field records an occupation status of the data, the second field indicates a node that occupies the data exclusively when the first field includes an exclusive state, and the node controller determines a second entry in the second table according to the address information of the data and the second field when the first field includes a shared state, where the second entry includes a third field, and the third field indicates nodes that share the data.

    Method and apparatus for processing system command during memory backup
    6.
    发明授权
    Method and apparatus for processing system command during memory backup 有权
    在内存备份期间处理系统命令的方法和装置

    公开(公告)号:US09513838B2

    公开(公告)日:2016-12-06

    申请号:US14132858

    申请日:2013-12-18

    Abstract: A method and an apparatus for processing a system command during memory backup. The method includes: acquiring a write address corresponding to a write operation command; if data corresponding to the write address has been read from a raw memory area but is not written to a backup memory area, mapping the write operation command to the raw memory area, and writing data to the write address in the raw memory area according to the write operation command; and deducting a set value from the write address to obtain an initial address to subsequently read data from the raw memory area. According to the embodiments of the present invention, a problem of system command blocking is solved during a memory backup operation, so that a system command is processed in a timely manner.

    Abstract translation: 一种在存储器备份期间处理系统命令的方法和装置。 该方法包括:获取与写入操作命令相对应的写入地址; 如果从原始存储器区域读取与写入地址相对应的数据,但是未写入到备份存储器区域,则将写入操作命令映射到原始存储器区域,并将数据写入原始存储区域中的写入地址,根据 写操作命令; 并从写入地址中扣除设定值以获得初始地址,以便随后从原始存储区读取数据。 根据本发明的实施例,在存储器备份操作期间解决了系统命令阻塞的问题,从而及时处理系统命令。

    Directory Maintenance Method and Apparatus
    7.
    发明申请
    Directory Maintenance Method and Apparatus 审中-公开
    目录维护方法和装置

    公开(公告)号:US20150254184A1

    公开(公告)日:2015-09-10

    申请号:US14635163

    申请日:2015-03-02

    Abstract: A directory maintenance method and apparatus are provided. The method includes sending, by a main memory according to a correspondence between a cache line in a directory and a cache, listening information to each cache corresponding to a cache line at a preset frequency; receiving, by each cache corresponding to the cache line, the listening information, and sending a listening response according to the listening information; and receiving, by the main memory, the listening response, and updating the directory according to the listening response, where the listening response includes a state of the cache line in the cache sending the listening response. The directory maintenance method and apparatus that are disclosed in the present invention can lower an impact of listening caused due to replacement on normal processing of a processor, and reduce degradation of system performance.

    Abstract translation: 提供了一种目录维护方法和装置。 该方法包括:根据目录中的高速缓存行和高速缓存之间的对应关系,通过主存储器将预设频率的与高速缓存行相对应的每个高速缓存的信息发送到主存储器; 通过对应于所述高速缓存线的每个缓存器接收所述收听信息,以及根据所述收听信息发送收听响应; 并且通过主存储器接收收听响应,并根据收听响应更新目录,其中监听响应包括发送收听响应的缓存中的高速缓存行的状态。 在本发明中公开的目录维护方法和装置可以降低由替换引起的收听对处理器的正常处理的影响,并且降低系统性能的降低。

    Packet transmission method and apparatus, and interconnect interface

    公开(公告)号:US10348616B2

    公开(公告)日:2019-07-09

    申请号:US15289246

    申请日:2016-10-10

    Abstract: A packet transmission method, packet transmission apparatus, and an interconnect interface are presented, where the method includes determining, by a sending node, whether an unrecoverable failure occurs in an active link, and if an unrecoverable failure occurs in the active link, selecting, from multiple communication links, at least one standby link except the active link to send a packet to a receiving node, so that the receiving node sends the packet to a receive end of the active link. In the method, for two nodes in an interconnect system that communicate with each other using multiple Links, when it is determined that an unrecoverable failure occurs in some of the Links, packets in retransmission buffers of transmit ends of the links in which the failure is unrecoverable are sent to a standby link.

    COMPUTER SUBSYSTEM AND COMPUTER SYSTEM WITH COMPOSITE NODES IN AN INTERCONNECTION STRUCTURE
    9.
    发明申请
    COMPUTER SUBSYSTEM AND COMPUTER SYSTEM WITH COMPOSITE NODES IN AN INTERCONNECTION STRUCTURE 审中-公开
    计算机子系统与计算机系统与互连结构中的复合节点

    公开(公告)号:US20160328357A1

    公开(公告)日:2016-11-10

    申请号:US15150419

    申请日:2016-05-09

    CPC classification number: G06F15/80 G06F13/4221 G06F15/167 G06F15/17337

    Abstract: The present invention provides a computer subsystem and a computer system. The computer subsystem includes L composite nodes, each composite node includes M basic nodes, each basic node includes N central processing units (CPUs) and one node controller. Any two CPUs in each basic node are interconnected. Each CPU in each basic node is connected to the node controller in the basic node. The node controller in each basic node has a routing function. Any two node controllers in the M basic nodes are interconnected. A connection between the L composite nodes formed through connections between node controllers enables communication between any two node controllers to be no more than three hops. The computer subsystem and the computer system according to embodiments of the present invention can reduce the kinds and the number of interconnection chips, and simplify an interconnection structure of a system, thereby improving reliability of the system.

    Abstract translation: 本发明提供一种计算机子系统和计算机系统。 计算机子系统包括L个复合节点,每个复合节点包括M个基本节点,每个基本节点包括N个中央处理单元(CPU)和一个节点控制器。 每个基本节点中的任何两个CPU都是互连的。 每个基本节点中的每个CPU都连接到基本节点中的节点控制器。 每个基本节点中的节点控制器具有路由功能。 M个基本节点中的任何两个节点控制器互连。 通过节点控制器之间的连接形成的L个复合节点之间的连接使得任何两个节点控制器之间的通信不超过三跳。 根据本发明的实施例的计算机子系统和计算机系统可以减少互连芯片的种类和数量,并且简化系统的互连结构,从而提高系统的可靠性。

    Data processing method and apparatus
    10.
    发明授权
    Data processing method and apparatus 有权
    数据处理方法和装置

    公开(公告)号:US09483401B2

    公开(公告)日:2016-11-01

    申请号:US13871335

    申请日:2013-04-26

    CPC classification number: G06F12/0802 G06F3/0662 G06F7/06

    Abstract: Embodiments of the present invention disclose a data processing method and apparatus. The method includes: first receiving an operation command, then searching, according to a memory address, a Cache memory in a Cache controller for data to be operated, and storing the operation command in a missed command buffer area in the Cache controller when the data to be operated is not found through searching in the Cache memory; then, storing data sent by an external memory in a data buffer area of the Cache controller after sending a read command to the external memory, and finally processing, according to a missed command, the data acquired from the external memory and the data carried in the missed command. The present invention applies to the field of computer systems.

    Abstract translation: 本发明的实施例公开了一种数据处理方法和装置。 该方法包括:首先接收操作命令,然后根据存储器地址搜索用于要操作的数据的Cache控制器中的Cache存储器,并且当数据被存储时,将操作命令存储在Cache控制器中的错过命令缓冲区域中 通过在高速缓冲存储器中进行搜索找不到; 然后,在向外部存储器发送读取命令之后,将由外部存储器发送的数据存储在Cache控制器的数据缓冲区中,并且根据错过的命令最后处理从外部存储器获取的数据和所携带的数据 错过的命令。 本发明适用于计算机系统领域。

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