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公开(公告)号：US20240365332A1
公开(公告)日：2024-10-31
申请号：US18759097
申请日：2024-06-28
发明人： Jun Xu , Huangping Jin , Hanqing Wang , Xiaohan Wang , Jiyong Pang
IPC分类号： H04W72/231 , H04W72/0453 , H04W72/0457 , H04W72/1268
CPC分类号： H04W72/231 , H04W72/0453 , H04W72/0457 , H04W72/1268
摘要： This application provides a communication method and a communication apparatus. In the method, the terminal device receives first indication information, where the first indication information indicates a quantity of bits occupied by second indication information, the second indication information indicates uplink precoding information of P RB sets, each resource block RB set in the P RB sets includes one or more RBs, different RB sets in the P RB sets correspond to different uplink precoding information, and P is greater than or equal to 2; the terminal device receives DCI; the terminal device determines the second indication information in the DCI based on the quantity of bits; and the terminal device sends uplink information based on the uplink precoding information of the P RB sets.
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公开(公告)号：US12105877B2
公开(公告)日：2024-10-01
申请号：US17373380
申请日：2021-07-12
摘要： The disclosure relates to technology for haptic stimulation. According to one aspect of the present disclosure, there is provided a haptic stimulation system comprising a haptic stimulation interface comprising a pattern of stimulation elements configured to stimulate receptors in skin of a user. The haptic stimulation system further comprises a control circuit configured to present information in the haptic stimulation interface in accordance with a presentation mode that is tailored to the user.
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公开(公告)号：US11887624B2
公开(公告)日：2024-01-30
申请号：US17733221
申请日：2022-04-29
IPC分类号： G11B7/09 , G11B7/0037
CPC分类号： G11B7/0941 , G11B7/0037 , G11B7/0938
摘要： A detection apparatus determines whether a recording layer of an optical disc is at a focal point of an objective lens. The detection apparatus includes an objective lens, a beam splitter, a reflector, a detector, and a servo controller. The reflector and the detector are disposed opposite to each other on two sides of an optical axis of the objective lens, and a normal line of the reflector is perpendicular to the optical axis. The beam splitter is disposed between the reflector and the detector and is located on the optical axis. The servo controller is connected to the detector.
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公开(公告)号：US11301379B2
公开(公告)日：2022-04-12
申请号：US16855129
申请日：2020-04-22
发明人： Jun Xu , Qun Yu , Yuangang Wang
IPC分类号： G06F12/00 , G06F12/0804 , G06F11/16 , G06F12/0868 , G06F12/02 , G06F11/14
摘要： An access request processing method is performed by a computer device that includes a processor, a dynamic random-access memory (DRAM), and a non-volatile memory (NVM). When receiving a write request, the processor may identify an object cache page according to the write request. The processor obtains the to-be-written data from a buffer according to a buffer pointer in the write request, the to-be-written data including a new data chunk to be written into the object cache page. The processor then inserts a new data node into a log chain of the object cache page, where the NVM stores data representing the log chain of the object cache page. The new data node includes information regarding the new data chunk of the object cache page. The computer device provided in this application can reduce system overheads while protecting data consistency.
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公开(公告)号：US10831677B2
公开(公告)日：2020-11-10
申请号：US16028265
申请日：2018-07-05
发明人： Jun Xu , Yongbing Huang , Yuangang Wang
IPC分类号： G06F12/121 , G06F12/122 , G06F12/0804 , G06F12/0871 , G06F3/06
摘要： A cache management method, a cache controller, and a computer system are provided. In the method, the cache controller obtains an operation instruction; when a destination address in the operation instruction hits no cache line cache line in a cache of the computer system, and the cache includes no idle cache line, the cache controller selects a to-be-replaced cache line from a replacement set, where the replacement set includes at least two cache lines; and the cache controller eliminates the to-be-replaced cache line from the cache, and stores, in the cache, a cache line obtained from the destination address. According to the cache management method, system overheads of cache line replacement can be reduced, and cache line replacement efficiency can be improved.
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公开(公告)号：US10733101B2
公开(公告)日：2020-08-04
申请号：US16047892
申请日：2018-07-27
发明人： Hao Xiao , Yuangang Wang , Jun Xu
IPC分类号： G06F12/0815 , G06F9/46 , G06F9/52 , G06F12/0806 , G06F12/0831
摘要： A processing node, a computer system, and a transaction conflict detection method, where the processing node includes a processor and a transactional cache. When obtaining a first operation instruction in a transaction for accessing shared data, the processor accesses the transactional cache for caching shared data of a transaction processed by the processing node. If the transactional cache determines that the first operation instruction fails to hit a cache line in the transactional cache, the transactional cache sends a first destination address in the operation instruction to a transactional cache in another processing node. After receiving status information of a cache line hit by the first destination address from the other processing node, the transactional cache determines, based on the received status information, whether the first operation instruction conflicts with a second operation instruction executed by the other processing node.
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公开(公告)号：US10732898B2
公开(公告)日：2020-08-04
申请号：US16105723
申请日：2018-08-20
发明人： Liang Shi , Chun Xue , Qiao Li , Dongfang Shan , Jun Xu , Yuangang Wang
摘要： A method for accessing a flash memory device and a flash memory device. After receiving a write request for an address, a flash memory controller obtains an indicator of the address, where the indicator indicates a last access type of the address, which might be a write operation or a read operation. When determining the indicator indicates a write operation, which means the access type for the address is normally write operation, to save time, the flash memory controller perform a fast-write operation on the address, when the indicator indicates a read operation, which means there might be plenty of read operations on the address, to facilitate future read operation, the controller performs a slow-write operation on the address.
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公开(公告)号：US10725662B2
公开(公告)日：2020-07-28
申请号：US16105315
申请日：2018-08-20
发明人： Qun Yu , Jun Xu , Yuangang Wang
IPC分类号： G06F3/06 , G06F12/08 , G06F12/0868
摘要： A storage system includes a management node and a plurality of storage nodes forming a redundant array of independent disks (RAID). When the management node determines that not all data in an entire stripe is updated based on a received write request, the management node sends update data chunk obtained from to-be-written data to corresponding storage node. The storage node do not directly update, based on the received update data chunks, data block stored in storage device of the storage node, but store the update data chunk into non-volatile memories (NVM) cache of the storage node and send the update data chunk to another storage node to backup. According to the data updating method, write amplification problems caused in a stripe update process can be reduced, thereby improving update performance of the storage system.
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公开(公告)号：US20180307602A1
公开(公告)日：2018-10-25
申请号：US16021555
申请日：2018-06-28
发明人： Jun Xu , Qun Yu , Yuangang Wang
IPC分类号： G06F12/0804
CPC分类号： G06F12/0804 , G06F12/00 , G06F2212/1032
摘要： An access request processing method and apparatus, and a computer device are disclosed. The computer device includes a processor, a dynamic random-access memory (DRAM), and a non-volatile memory (NVM). When receiving a write request, the processor may identify an object cache page according to the write request. The processor obtains the to-be-written data from a buffer according to a buffer pointer in the write request, the to-be-written data including a new data chunk to be written into the object cache page. The processor then inserts a new data node into a log chain of the object cache page, where the NVM stores data representing the log chain of the object cache page. The new data node includes information regarding the new data chunk of the object cache page. The computer device provided in this application can reduce system overheads while protecting data consistency.
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公开(公告)号：US20180300236A1
公开(公告)日：2018-10-18
申请号：US16018602
申请日：2018-06-26
发明人： Jun Xu , Qun Yu , Licheng Chen
摘要： An access request processing method and apparatus, and a computer system is disclosed. The computer system includes a processor and a non-volatile memory (NVM). When receiving a write request, the processor determines an object cache page according to the write request. After determining that the NVM stores a log chain of the object cache page, the processor inserts, into the log chain of the object cache page, a second data node recording information about a second log data chunk. The log chain already includes a first data node recording information about the first log data chunk. The second log data chunk is at least partial to-be-written data of the write request. Then, the processor sets, in the first data node, data that is in the first log data chunk and that overlaps the second log data chunk to invalid data.
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