公开(公告)号：US12068202B2

公开(公告)日：2024-08-20

申请号：US17244410

申请日：2021-04-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Sunhom Steve Paak ,  Xiaolong Ma ,  Yanxiang Liu ,  Daxiang Wang ,  Zanfeng Chen ,  Yu Xia ,  Huabin Chen ,  Yongjie Zhou

IPC: H01L21/8234 ,  H01L21/02 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L21/823481 ,  H01L21/0259 ,  H01L21/823412 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/0642 ,  H01L29/0665 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/7851 ,  H01L29/78696

Abstract: This application provides an integrated circuit device and a preparation method thereof, and relates to the field of semiconductor technologies. An isolation section for suppressing a leakage current path of two adjacent transistors may be formed by using a simple process. The integrated circuit device includes a substrate and a fin protruding from the substrate. The integrated circuit device further includes two adjacent transistors. The two adjacent transistors use two spaced segments on the fin as respective channels of the two adjacent transistors. A part that is of the fin and that is located between the two spaced segments is processed to obtain an isolation section. The isolation section is used to suppress current transfer between the two channels of the two adjacent transistors.

公开(公告)号：US20210249311A1

公开(公告)日：2021-08-12

申请号：US17244410

申请日：2021-04-29

Applicant: Huawei Technologies Co., Ltd.

Inventor： Sunhom Steve Paak ,  Xiaolong Ma ,  Yanxiang Liu ,  Daxiang Wang ,  Zanfeng Chen ,  Yu Xia ,  Huabin Chen ,  Yongjie Zhou

IPC: H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786 ,  H01L21/02 ,  H01L29/66

Abstract: This application provides an integrated circuit device and a preparation method thereof, and relates to the field of semiconductor technologies. An isolation section for suppressing a leakage current path of two adjacent transistors may be formed by using a simple process. The integrated circuit device includes a substrate and a fin protruding from the substrate. The integrated circuit device further includes two adjacent transistors. The two adjacent transistors use two spaced segments on the fin as respective channels of the two adjacent transistors. Apart that is of the fin and that is located between the two spaced segments is processed to obtain an isolation section. The isolation section is used to suppress current transfer between the two channels of the two adjacent transistors.