Channel quality assessment method and system for performing the same
    1.
    发明授权
    Channel quality assessment method and system for performing the same 失效
    渠道质量评估方法和系统执行相同

    公开(公告)号:US07012971B2

    公开(公告)日:2006-03-14

    申请号:US09929165

    申请日:2001-08-14

    IPC分类号: H03K9/00

    摘要: A channel quality assessment with short assessment time and good frequency resolution is disclosed. Some channels are grouped and their detecting results are collected as whale to determine the channel quality. The channel quality is determined by interference collision ratio, which is the ratio of the number of interference events to the sum of the number of interference events and interference-free events. Interfered channels are disabled form the group. The Channel quality of each of plurality of channels is determined from detection results of each of plurality of groups so as to have a short assessment time and meanwhile a good frequency resolution may be retained.

    摘要翻译: 披露了具有短评估时间和良好频率分辨率的信道质量评估。 一些渠道被分组,其检测结果被收集为鲸鱼以确定信道质量。 信道质量由干扰冲突比确定,干扰冲突比是干扰事件数与干扰事件数量和无干扰事件之和的比率。 受干扰的通道从组中被禁用。 从多个组中的每一个的检测结果确定多个信道中的每一个的信道质量,以便具有短的评估时间,同时可以保持良好的频率分辨率。

    Selective frequency hopping for hit avoidance in wireless communications system and method
    2.
    发明授权
    Selective frequency hopping for hit avoidance in wireless communications system and method 有权
    无线通信系统中的避免选择性跳频和方法

    公开(公告)号:US07092428B2

    公开(公告)日:2006-08-15

    申请号:US09874510

    申请日:2001-06-05

    IPC分类号: H04B1/713

    摘要: A selective hopping method for hit avoidance in a frequency hopping spread spectrum communication system utilizing an original hopping sequence, having a plurality of available channels for receiving signal packet traffic utilizing a plurality of receiving signal slots are disclosed. The plurality of available channels all are available for use in frequency hopping. The method includes the steps of dividing the plurality of available channels into a plurality of partitions; distributing the available channels in each of the plurality of partitions into a predetermined distribution; forming a partition sequence by assigning a predetermined number of channels to a plurality of selected receiving signal slot sets; generating a generated hopping sequence by partition mapping, in which the partition mapping is responsive to the partition sequence; and managing the receiving signal packet traffic, in which the receiving signal packet traffic is transmitted only in the selected receiving signal slot sets.

    摘要翻译: 公开了一种使用原始跳频序列的跳频扩频通信系统中的命中避免的选择性跳频方法,该跳频序列具有多个可用信道,用于利用多个接收信号时隙接收信号分组业务。 多个可用信道都可用于跳频。 该方法包括以下步骤:将多个可用信道划分成多个分区; 将所述多个分区中的每一个中的可用信道分配为预定分布; 通过将预定数量的信道分配给多个所选择的接收信号时隙集合来形成分区序列; 通过分区映射生成生成的跳频序列,其中分区映射响应分区序列; 以及管理接收信号分组业务,其中仅在所选择的接收信号时隙集中发送接收信号分组业务。

    Differential detection of GFSK signal using decision feedback and preamble for carrier, clock and frame synchronization
    3.
    发明授权
    Differential detection of GFSK signal using decision feedback and preamble for carrier, clock and frame synchronization 失效
    使用决策反馈和载波,时钟和帧同步的前导码对GFSK信号进行差分检测

    公开(公告)号:US07039132B1

    公开(公告)日:2006-05-02

    申请号:US09799802

    申请日:2001-03-07

    IPC分类号: H04L27/14 H04L27/16 H04L27/22

    摘要: This invention provides a method for bit detection of the GFSK signals at the receiver end. The bit detection is done digitally after the carrier is removed. It employs differential detection incorporated with decision feedback, which uses previous one (so-called on-bit differential detection), or two (so-called two-bit differential detection) bits as correcting information. In addition, synchronization for bit timing and frequency offset resulted from clocks between the transmitter and receiver are also performed with or without preamble as prior information. If preamble is available, the bit timing and frequency-offset bias are estimated from the preamble, which is the case of this present invention. If preamble is not available, this information is estimated directly from the unknown received signals. Once the information about the bit timing and frequency offset is obtained, it is used for the following bit detection.

    摘要翻译: 本发明提供了一种用于在接收机端对GFSK信号进行比特检测的方法。 在移除载波后,数字地进行位检测。 它采用结合有使用前一个(所谓的位差分检测)或两个(所谓的2位差分检测)位作为校正信息的判定反馈的差分检测。 此外,由发送器和接收器之间的时钟产生的比特定时和频率偏移的同步也是作为先验信息执行的,具有或不具有前同步码。 如果前导码可用,则从前导码估计比特定时和频偏偏移,这是本发明的情况。 如果前导码不可用,则该信息直接从未知的接收信号估计。 一旦得到关于位定时和频率偏移的信息,它被用于以下位检测。

    Method and apparatus for selective collision avoidance frequency hopping
    4.
    发明授权
    Method and apparatus for selective collision avoidance frequency hopping 失效
    选择性碰撞避免跳频的方法和装置

    公开(公告)号:US07068702B2

    公开(公告)日:2006-06-27

    申请号:US09759677

    申请日:2001-01-12

    IPC分类号: H04B1/69 H04B1/707 H04B1/713

    摘要: A method and an apparatus for determining a hopping sequence for selecting a channel from a plurality of channels divided into a plurality of partitions to reduce probability of data collision in a frequency hopping spread spectrum (FHSS) communication system are provided. The communication system stores multiple predetermined partition sequences and receives a first sequence generated by a convention sequence generator.

    摘要翻译: 提供了一种用于确定用于从分割成多个分区的多个信道中选择信道以减少跳频扩频(FHSS)通信系统中的数据冲突的概率的跳频序列的方法和装置。 通信系统存储多个预定分区序列,并接收由惯例序列发生器产生的第一序列。

    DISPLAY SUBSTRATE HAVING ARCHED SIGNAL TRANSMISSION LINE AND MANUFACTURE METHOD THEREOF
    5.
    发明申请
    DISPLAY SUBSTRATE HAVING ARCHED SIGNAL TRANSMISSION LINE AND MANUFACTURE METHOD THEREOF 有权
    具有编组信号传输线的显示基板及其制造方法

    公开(公告)号:US20100302750A1

    公开(公告)日:2010-12-02

    申请号:US12723321

    申请日:2010-03-12

    IPC分类号: H05K1/11 H05K3/32

    摘要: This invention discloses a display device mother substrate, a display device substrate and a manufacture method of display device substrate thereof. The display device mother substrate includes a first substrate, a second substrate, a first active area circuit and a first transmission line, wherein a first cutting line is defined between the first substrate and the second substrate. The first active area circuit is disposed on the first substrate and is electrically connected to the first transmission line. The first transmission line includes a display line portion, an end line portion and a middle line portion, wherein the display line portion is electrically connected to the first active area circuit. The middle line portion is disposed on the second substrate, wherein two ends of the middle line portion are electrically connected to the display line portion and the end line portion respectively at the first cutting line. The display device mother substrate is cut along the first cutting line to be separated into the first substrate and the second substrate, wherein the middle line portion is also separated from the display line portion and the end line portion.

    摘要翻译: 本发明公开了一种显示装置母板,显示装置用基板及其显示装置用基板的制造方法。 显示装置母板包括第一基板,第二基板,第一有源区电路和第一传输线,其中在第一基板和第二基板之间限定第一切割线。 第一有源区电路设置在第一基板上,并与第一传输线电连接。 第一传输线包括显示线部分,端部线部分和中间线部分,其中显示线部分电连接到第一有源区电路。 中间线部分设置在第二基板上,其中中间线部分的两端分别在第一切割线处电连接到显示线部分和端部线部分。 显示装置母基板沿着第一切割线切割以分离成第一基板和第二基板,其中中间线部分也与显示线部分和端部线部分分离。

    Timing offset compensation in orthogonal frequency division multiplexing systems
    6.
    发明授权
    Timing offset compensation in orthogonal frequency division multiplexing systems 有权
    正交频分复用系统中的定时偏移补偿

    公开(公告)号:US07251283B2

    公开(公告)日:2007-07-31

    申请号:US10689424

    申请日:2003-10-20

    申请人: Hung-Kun Chen

    发明人: Hung-Kun Chen

    IPC分类号: H04K1/10

    摘要: A robust timing offset compensation scheme for multi-carrier systems. According to the invention, a timing offset compensator is provided to compensate a current symbol in the frequency domain for the effect of timing offset with a timing offset prediction value. Then a timing error estimator calculates a timing error value for the current symbol based on a function of a phase tracking value, a channel response of each pilot subcarrier, transmitted data on each pilot subcarrier, and a timing compensated version of the current symbol on the pilot subcarrier locations. Furthermore, a timing tracking unit receives the timing error value of the current symbol to generate a shift amount of the DFT window and the timing offset prediction value for a next symbol.

    摘要翻译: 一种用于多载波系统的鲁棒定时偏移补偿方案。 根据本发明,提供了一种定时偏移补偿器,用于利用定时偏移预测值来补偿频域中的当前符号以用于定时偏移的影响。 然后,定时误差估计器基于相位跟踪值的函数,每个导频子载波的信道响应,每个导频副载波上的发送数据以及当前符号的定时补偿版本,计算当前符号的定时误差值 导频副载波位置。 此外,定时跟踪单元接收当前符号的定时误差值,以产生用于下一个符号的DFT窗口的移位量和定时偏移预测值。

    OFDM detection apparatus and method for networking devices

    公开(公告)号:US07123662B2

    公开(公告)日:2006-10-17

    申请号:US10463743

    申请日:2003-06-17

    IPC分类号: H04K1/10 H04L27/04 H04J11/00

    摘要: An OFDM detection apparatus and method for networking devices. First, a sample sequence is taken from the beginning of a newly arrived network packet. Next, a first correlation sequence between the complex conjugate of the sample sequence and the sample sequence with a lag of N samples is formed. In the meantime, a second correlation sequence between the complex conjugate of the sample sequence and the sample sequence with a lag of M samples is also formed. The first and the second correlation sequence are then normalized. Depending on a comparison between the first normalized correlation sequence and a first predetermined threshold as well as another comparison between the second normalized correlation sequence and a second predetermined threshold, the newly arrived network packet is determined accordingly whether it is an OFDM modulated packet.

    Sound signal processing system and related apparatus and method
    8.
    发明授权
    Sound signal processing system and related apparatus and method 有权
    声音信号处理系统及相关设备及方法

    公开(公告)号:US07860913B2

    公开(公告)日:2010-12-28

    申请号:US11671430

    申请日:2007-02-05

    IPC分类号: G06F17/10

    摘要: The invention discloses a finite impulse response (FIR) filter for processing a digital input signal to generate a digital output signal. The FIR filter has a tap amount N and a decimation ratio D. The FIR filter includes a first memory, a multiplier, and an accumulation module. For each input sample of the digital input signal, the first memory provides N/D corresponding tap coefficients from a plurality of tap coefficients in turn. The multiplier multiplies the input sample with the N/D corresponding tap coefficients in turn to generate N/D product values. The accumulation module adds the N/D product values to N/D previous accumulation values to generate N/D renewed accumulation values respectively. If one of the accumulation values has already accumulated N product values, the accumulation module outputs the accumulation value as an output sample of the digital output signal.

    摘要翻译: 本发明公开了一种用于处理数字输入信号以产生数字输出信号的有限脉冲响应(FIR)滤波器。 FIR滤波器具有抽头量N和抽取比例D. FIR滤波器包括第一存储器,乘法器和累加模块。 对于数字输入信号的每个输入采样,第一存储器依次从多个抽头系数提供N / D对应的抽头系数。 乘数依次将输入采样与N / D对应的抽头系数相乘以产生N / D乘积值。 累加模块将N / D乘积值添加到N / D先前累积值,以分别产生N / D更新累积值。 如果积累值中的一个已经累积了N个乘积值,则累积模块输出累加值作为数字输出信号的输出样本。

    SOUND SIGNAL PROCESSING SYSTEM AND RELATED APPARATUS AND METHOD
    9.
    发明申请
    SOUND SIGNAL PROCESSING SYSTEM AND RELATED APPARATUS AND METHOD 有权
    声信号处理系统及相关装置及方法

    公开(公告)号:US20080123772A1

    公开(公告)日:2008-05-29

    申请号:US11671430

    申请日:2007-02-05

    IPC分类号: H04L25/49

    摘要: The invention discloses a finite impulse response (FIR) filter for processing a digital input signal to generate a digital output signal. The FIR filter has a tap amount N and a decimation ratio D. The FIR filter includes a first memory, a multiplier, and an accumulation module. For each input sample of the digital input signal, the first memory provides N/D corresponding tap coefficients from a plurality of tap coefficients in turn. The multiplier multiplies the input sample with the N/D corresponding tap coefficients in turn to generate N/D product values. The accumulation module adds the N/D product values to N/D previous accumulation values to generate N/D renewed accumulation values respectively. If one of the accumulation values has already accumulated N product values, the accumulation module outputs the accumulation value as an output sample of the digital output signal.

    摘要翻译: 本发明公开了一种用于处理数字输入信号以产生数字输出信号的有限脉冲响应(FIR)滤波器。 FIR滤波器具有抽头量N和抽取比例D. FIR滤波器包括第一存储器,乘法器和累加模块。 对于数字输入信号的每个输入采样,第一存储器依次从多个抽头系数提供N / D对应的抽头系数。 乘数依次将输入采样与N / D对应的抽头系数相乘以产生N / D乘积值。 累加模块将N / D乘积值添加到N / D先前累积值,以分别产生N / D更新累积值。 如果积累值中的一个已经累积了N个乘积值,则累积模块输出累加值作为数字输出信号的输出样本。