公开(公告)号：US20240272754A1

公开(公告)日：2024-08-15

申请号：US18644835

申请日：2024-04-24

Applicant: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED

Inventor： Akitoshi SAKAUE

IPC: G06F3/044 ,  G06F3/041 ,  H05K1/09 ,  H05K3/12

CPC classification number: G06F3/0445 ,  G06F3/04164 ,  G06F3/0446 ,  H05K1/092 ,  H05K3/12 ,  G06F2203/04103 ,  G06F2203/04112 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09263

Abstract: In printed wiring that is formed, on a surface of a base member. by a film of cured electrically conductive ink and that includes: a wavy line; a first wiring element located at one side of both sides sandwiching the wavy line in a width direction; and a second wiring element located at the other side of the both sides and adjacently to the wavy line; a surplus wavy line is provided which is another wavy line, which extends along the wavy line adjacently to the wavy line between the wavy line and the first wiring element, and which is connected to the wavy line to have the same potential.

公开(公告)号：US20240040690A1

公开(公告)日：2024-02-01

申请号：US17280888

申请日：2020-12-30

Applicant: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.

Inventor： Shijuan Yi ,  Liang Sun ,  Likun Cheng

IPC: H05K1/02

CPC classification number: H05K1/0283 ,  H05K1/0298 ,  H05K2201/09245

Abstract: The present application discloses a display panel and a display device, including a plurality of pixel islands, a plurality of connection bridges connecting the plurality of pixel islands, and first power lines and second power line arranged on the plurality of connection bridges and conducting the plurality of pixel islands, wherein the plurality of connection bridges include first connection bridges arranged along a first direction, and only the first power line or the second power line is provided on each of the first connection bridges.

公开(公告)号：US11751322B2

公开(公告)日：2023-09-05

申请号：US17703051

申请日：2022-03-24

Applicant: Cisco Technology, Inc.

Inventor： Joel Goergen ,  Scott Hinaga ,  Jessica Kiefer ,  Alpesh Umakant Bhobe ,  D. Brice Achkir ,  David Nozadze ,  Amendra Koul ,  Mehmet Onder Cap ,  Madeline Marie Roemer

IPC: H05K1/02

CPC classification number: H05K1/0239 ,  H05K1/0242 ,  H05K2201/09245

Abstract: A conductive signal transmission structure for an electronic device (e.g., a printed circuit board of an electronic device) includes a copper material and a graphene layer disposed within the copper material at a depth below a surface of the structure. The depth of the graphene layer is further within a skin depth region of the structure when a transmission signal applied to the conductive signal transmission structure has a signal speed of at least 112 Gbps.

公开(公告)号：US20190245308A1

公开(公告)日：2019-08-08

申请号：US16241422

申请日：2019-01-07

Applicant: CommScope Technologies LLC

Inventor： Bernard Harold Hammond, JR. ,  David Patrick Murray ,  Ian Robert George

IPC: H01R13/6466 ,  H01R24/64 ,  H01R4/2416 ,  H01R13/66 ,  H01R13/719 ,  H05K1/02

CPC classification number: H01R13/6466 ,  H01R4/2416 ,  H01R13/6658 ,  H01R13/719 ,  H01R24/64 ,  H01R2107/00 ,  H05K1/0228 ,  H05K1/162 ,  H05K3/4644 ,  H05K2201/09236 ,  H05K2201/09245 ,  H05K2201/09263 ,  H05K2201/10189 ,  Y10S439/941 ,  Y10T29/49117 ,  Y10T29/49204 ,  Y10T29/49222

Abstract: The present disclosure relates to a telecommunications jack including a housing having a port for receiving a plug. The jack also includes a plurality of contact springs adapted to make electrical contact with the plug when the plug is inserted into the port of the housing, and a plurality of wire termination contacts for terminating wires to the jack. The jack further includes a circuit board that electrically connects the contact springs to the wire termination contacts. The circuit board includes a multi-zone crosstalk compensation arrangement for reducing crosstalk at the jack.

公开(公告)号：US09916050B2

公开(公告)日：2018-03-13

申请号：US14704181

申请日：2015-05-05

Applicant: Japan Display Inc.

Inventor： Masanobu Ikeda ,  Koji Ishizaki ,  Hayato Kurasawa

IPC: G06F3/041 ,  G06F3/044 ,  H05K1/02

CPC classification number: G06F3/044 ,  G06F3/041 ,  G06F3/0412 ,  G06F3/0416 ,  G06F2203/04112 ,  H05K1/0298 ,  H05K2201/09245 ,  H05K2201/10128 ,  H05K2201/10166

Abstract: [PROBLEM] To reduce a time constant of an electric circuit including driving electrodes and detecting electrodes in a display provided with an input device, and reduce a temperature variation ratio of the time constant.[SOLVING MEANS] The display 1 includes driving electrodes COML provided along an X axis direction when seen in a plan view, buffer TFT elements Trb serially connected to the driving electrodes COML, and a plurality of detecting electrodes TDL respectively provided to intersect with the driving electrodes COML when seen in a plan view and aligned in the X axis direction. A temperature coefficient of resistance of a sum of an ON resistance of the buffer TFT elements Trb and a resistance of the driving electrodes COML is negative, each of the specific resistances of the plurality of detecting electrodes TDL is not more than 40 μΩcm, and each of the temperature coefficients of resistance of the plurality of detecting electrodes TDL is 1×10−3 to 5×10−3K−1.

公开(公告)号：US09844145B2

公开(公告)日：2017-12-12

申请号：US15194995

申请日：2016-06-28

Applicant: MC10, Inc.

Inventor： Yung-Yu Hsu

IPC: H05K7/00 ,  H05K1/18 ,  H05K1/03 ,  H05K1/11 ,  H05K1/02 ,  H05K1/09 ,  H01R9/00 ,  H05K3/46 ,  H05K1/14

CPC classification number: H05K1/185 ,  H05K1/0271 ,  H05K1/028 ,  H05K1/0283 ,  H05K1/036 ,  H05K1/0393 ,  H05K1/09 ,  H05K1/118 ,  H05K1/147 ,  H05K1/148 ,  H05K1/189 ,  H05K3/4691 ,  H05K3/4694 ,  H05K2201/0133 ,  H05K2201/0154 ,  H05K2201/0187 ,  H05K2201/09245 ,  H05K2201/1028 ,  H05K2201/10287 ,  H05K2201/2009

Abstract: Buffer structures are provided that can be used to reduce a strain in a conformable electronic system that includes compliant components in electrical communication with more rigid device components. The buffer structures are disposed on, or at least partially embedded in, the conformable electronic system such that the buffer structures overlap with at least a portion of a junction region between a compliant component and a more rigid device component. The buffer structure can have a higher value of Young's modulus than an encapsulant of the conformable electronic system.

公开(公告)号：US09439283B2

公开(公告)日：2016-09-06

申请号：US14703072

申请日：2015-05-04

Applicant: FUJIFILM Corporation

Inventor： Tadashi Kuriki

IPC: H03K17/975 ,  H05K1/02 ,  G06F3/044

CPC classification number: G06F3/044 ,  G06F2203/04103 ,  G06F2203/04112 ,  H05K1/0298 ,  H05K2201/09245

Abstract: Disclosed are a conductive sheet, a usage method of the conductive sheet and a capacitive type touch panel. For a first conductive sheet, two or more conductive first large grids are formed atop a first transparent base, wherein each first large grid is constituted by combining two or more small grids, and the shapes of facing sides of each first large grid are formed to alternate. For example, rectangular waveshapes of a first side portion of the first large grid and of a fourth side portion facing the first side portion are made to alternate, and rectangular waveshapes of a second side portion of the first large grid and of a third side portion facing the second side portion are made to alternate.

Abstract translation: 公开了导电片，导电片和电容式触摸面板的使用方法。 对于第一导电片，在第一透明基底顶部形成有两个或多个导电的第一大栅格，其中每个第一大栅格通过组合两个或更多个小栅格构成，并且每个第一大栅格的相对侧的形状形成为 备用。 例如，使第一大格栅的第一侧部分和面向第一侧部分的第四侧部分的矩形波形彼此交替，并且第一大格栅的第二侧部分和第三侧部分的矩形波形 面对第二侧部分是交替的。

公开(公告)号：US20160147374A1

公开(公告)日：2016-05-26

申请号：US15010744

申请日：2016-01-29

Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

Inventor： Shinya HASHIMOTO

IPC: G06F3/041 ,  H05K1/02 ,  H05K1/11 ,  G06F3/044

CPC classification number: G06F3/0416 ,  G02F1/133345 ,  G02F1/13338 ,  G02F1/13439 ,  G06F1/16 ,  G06F3/0412 ,  G06F3/0418 ,  G06F3/044 ,  G06F2203/04103 ,  G06F2203/04107 ,  G06F2203/04111 ,  H05K1/0216 ,  H05K1/11 ,  H05K1/118 ,  H05K3/361 ,  H05K2201/09245 ,  H05K2201/09254

Abstract: A display device includes a display panel, and an electrostatic capacitive type touch panel which is formed in an overlapping manner with the display panel. A plurality of X electrodes and a plurality of Y electrodes intersecting with the X electrodes. A first signal line supplies signals to the X electrodes, a second signal line supplies signals to the Y electrodes, and the first signal line and the second signal line are formed on a flexible printed circuit board. A dummy electrode is formed adjacent to an electrode portion of each X electrode and electrode portion of each Y electrode, the dummy electrode does not overlap the X electrode and the Y electrode, and the dummy electrode does not electrically connect with the first and second signal lines.

公开(公告)号：US09288893B2

公开(公告)日：2016-03-15

申请号：US12537430

申请日：2009-08-07

Applicant: Sampath Komarapalayam Velayudham Karikalan

Inventor： Sampath Komarapalayam Velayudham Karikalan

IPC: H05K1/00 ,  H05K3/10 ,  H05K1/02

CPC classification number: H05K1/0245 ,  H05K2201/09245 ,  H05K2201/097 ,  Y10T29/49155

Abstract: A twisted differential conductor pair is formed on a circuit board that includes first-third conductors. The second conductor includes first-third portions. The second portion of the second conductor extends between an end of the first conductor and an end of the third conductor, and couples an end of the first portion of the second conductor to an end of the third portion of the second conductor. A solder mask layer is formed over the first, second, and third conductors on the circuit board. An end of the first conductor and the end of the third conductor are exposed through the solder mask layer. The exposed end of the first conductor is coupled to the exposed end of the third conductor over the solder mask layer with a bridge. This configuration may be repeated to create multiple twists along the twisted differential conductor pair.

Abstract translation: 在包括第一至第三导体的电路板上形成扭曲的差分导体对。 第二导体包括第一第三部分。 第二导体的第二部分在第一导体的端部和第三导体的端部之间延伸，并且将第二导体的第一部分的端部耦合到第二导体的第三部分的端部。 在电路板上的第一，第二和第三导体上形成焊接掩模层。 第一导体的一端和第三导体的端部通过焊接掩模层露出。 第一导体的暴露端通过桥接在焊料掩模层上与第三导体的暴露端耦合。 可以重复该配置以沿着扭曲的差分导体对产生多个扭曲。

公开(公告)号：US09282632B2

公开(公告)日：2016-03-08

申请号：US13861907

申请日：2013-04-12

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Tetsuo Saji ,  Hiroshi Nakamura

IPC: H05K1/18 ,  H05K1/02 ,  H01P3/08 ,  H05K3/46

CPC classification number: H05K1/0253 ,  H01P3/088 ,  H05K1/0227 ,  H05K1/185 ,  H05K3/4602 ,  H05K2201/09245 ,  H05K2201/09336 ,  H05K2201/09727

Abstract: A multilayer circuit substrate includes: a first conductor layer in which first transmission lines and a second transmission line are formed; a second conductive layer facing the first conductive layer through an insulating layer; and a third conductive layer that faces the second conductive layer through an insulating layer and that has a bypass line formed therein. The bypass line is electrically connected to the second transmission line of the first conductive layer through via conductors and such that the second transmission line and the first transmission lines intersect with each other. In the second conductive layer, a ground conductor is formed at least in a position that faces the bypass line, and the first transmission lines are made narrower at the intersection with the second transmission line than other portions.

Abstract translation: 多层电路基板包括：第一导体层，其中形成有第一传输线和第二传输线; 通过绝缘层面对所述第一导电层的第二导电层; 以及通过绝缘层面向所述第二导电层并且在其中形成有旁路线的第三导电层。 旁通线路通过通孔导体与第一导电层的第二传输线电连接，使得第二传输线与第一传输线相互交叉。 在第二导电层中，至少形成面向旁路线的位置的接地导体，并且使第一传输线在与第二传输线的交点处比其它部分更窄。