System and method for self calibrating voltage-controlled oscillator
    1.
    发明申请
    System and method for self calibrating voltage-controlled oscillator 有权
    用于自校准压控振荡器的系统和方法

    公开(公告)号:US20070249293A1

    公开(公告)日:2007-10-25

    申请号:US11586655

    申请日:2006-10-26

    IPC分类号: H04B1/40 H04B1/06 H04B7/00

    摘要: A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an automatic gain tuning mode, and a phase-locking mode, from a frequency comparison result between a reference clock signal and a divided clock signal which is generated by dividing a frequency of an oscillation signal, and thereby controls the VCO, so that the VCO may generate the oscillation signal which is automatically phase-locked in a target frequency with an optimal state.

    摘要翻译: 一种用于自校准压控振荡器(VCO)的系统和方法。 在该系统中,模式控制器根据参考时钟信号和分频时钟信号之间的频率比较结果,生成自动频带选择模式,自动增益调谐模式和锁相模式中的每一个的控制信号 通过分频振荡信号产生,从而控制VCO,使得VCO可以产生具有最佳状态的目标频率中自动锁相的振荡信号。

    System and method for self calibrating voltage-controlled oscillator
    2.
    发明授权
    System and method for self calibrating voltage-controlled oscillator 有权
    用于自校准压控振荡器的系统和方法

    公开(公告)号:US07548124B2

    公开(公告)日:2009-06-16

    申请号:US11586655

    申请日:2006-10-26

    IPC分类号: H03L7/113

    摘要: A system and a method for self calibrating a voltage-controlled oscillator (VCO). In the system, a mode controller generates a control signal for each of an automatic band selection mode, an automatic gain tuning mode, and a phase-locking mode, from a frequency comparison result between a reference clock signal and a divided clock signal which is generated by dividing a frequency of an oscillation signal, and thereby controls the VCO, so that the VCO may generate the oscillation signal which is automatically phase-locked in a target frequency with an optimal state.

    摘要翻译: 一种用于自校准压控振荡器(VCO)的系统和方法。 在该系统中,模式控制器根据参考时钟信号和分频时钟信号之间的频率比较结果,生成自动频带选择模式,自动增益调谐模式和锁相模式中的每一个的控制信号 通过分频振荡信号产生,从而控制VCO,使得VCO可以产生具有最佳状态的目标频率中自动锁相的振荡信号。

    Phase-locked loop for stably adjusting frequency-band of voltage-controlled oscillator and phase locking method
    3.
    发明授权
    Phase-locked loop for stably adjusting frequency-band of voltage-controlled oscillator and phase locking method 有权
    用于稳压调压振荡器频带的锁相环和锁相方法

    公开(公告)号:US07471159B2

    公开(公告)日:2008-12-30

    申请号:US11595887

    申请日:2006-11-13

    CPC分类号: H03L7/10 Y10S331/02

    摘要: A phase-locked loop (PLL) for stably adjusting a frequency band of a voltage-controlled oscillator and a phase locking method. In the PLL, a frequency band controller alters the frequency band selection digital value in response to an input clock signal and an oscillation control signal generated from an LPF of a basic PLL circuit, and thus a voltage-controlled oscillator of the basic PLL circuit alters the frequency of an output clock signal in response to the oscillation control signal and the frequency band selection digital value. The output clock signal is rapidly and stably phase-locked at a target frequency depending on the frequency band selection digital value.

    摘要翻译: 用于稳定地调节压控振荡器的频带的锁相环(PLL)和相位锁定方法。 在PLL中,频带控制器响应于从基本PLL电路的LPF产生的输入时钟信号和振荡控制信号来改变频带选择数字值,因此基本PLL电路的压控振荡器改变 响应于振荡控制信号和频带选择数字值的输出时钟信号的频率。 根据频带选择数字值,输出时钟信号以目标频率快速稳定地锁相。

    Fast mode switching frequency synthesizing apparatus and method for operating in low power consumption
    4.
    发明授权
    Fast mode switching frequency synthesizing apparatus and method for operating in low power consumption 有权
    快速模式切换频率合成装置和低功耗操作方法

    公开(公告)号:US07725088B2

    公开(公告)日:2010-05-25

    申请号:US11475973

    申请日:2006-06-28

    IPC分类号: H04B1/18

    CPC分类号: H03B21/00 H03B2200/0048

    摘要: A fast mode switching frequency synthesizing apparatus and method for operating in low power consumption. In the frequency synthesizer, according to a mode control signal, an SSB mixer selectively generates and outputs a signal having a frequency which is identical to an input signal RF or outputs a signal having a frequency which is a synthesized frequency of the input signals RF and LO. Frequency synthesized signals having a frequency which is a sum of frequencies of the input signals RF and LO, or a difference of frequencies therebetween, may be generated by changing wiring of a path switch according to a phase control signal.

    摘要翻译: 一种用于低功耗运行的快速模式切换频率合成装置和方法。 在频率合成器中,根据模式控制信号,SSB混频器选择性地产生并输出具有与输入信号RF相同的频率的信号,或者输出具有作为输入信号RF的合成频率的频率的信号 LO。 可以通过根据相位控制信号改变路径开关的布线来产生具有作为输入信号RF和LO的频率之和的频率或其间的频率差的频率合成信号。

    Frequency synthesizing apparatus and method having injection-locked quadrature VCO in RF transceiver
    5.
    发明授权
    Frequency synthesizing apparatus and method having injection-locked quadrature VCO in RF transceiver 有权
    RF收发器中具有注入锁相正交VCO的频率合成装置和方法

    公开(公告)号:US07656238B2

    公开(公告)日:2010-02-02

    申请号:US11447887

    申请日:2006-06-07

    IPC分类号: H03B21/01 H03L7/00

    CPC分类号: H03L7/24 H03B21/02 H03L7/0995

    摘要: A frequency synthesizing apparatus and method having an injection-locked quadrature VCO in an RF transceiver is provided. In the frequency synthesizer, an I signal following a frequency of a high frequency signal that is input using the injection-locked quadrature VCO and a Q signal thereof are simultaneously generated to have an appropriate driving power. Accordingly, the I signal and the Q signal thereof that are generated in the injection-locked quadrature VCO may be utilized as a local signal for frequency up/down-conversion, without being buffered. An output of an SSB mixer may be directly input into the injection-locked quadrature VCO. Also, high frequency signals that are generated in another circuit such as the SSB mixer, a PLL, or a VCO may be selected to be input into the injection-locked quadrature VCO by a selector.

    摘要翻译: 提供了一种在RF收发器中具有注入锁定正交VCO的频率合成装置和方法。 在频率合成器中,同时产生跟随使用注入锁定正交VCO输入的高频信号的频率的I信号及其Q信号以具有适当的驱动功率。 因此,在注入锁定正交VCO中产生的I信号和Q信号可以用作用于上变频/下变频的本地信号,而不被缓冲。 SSB混频器的输出可以直接输入到注入锁相正交VCO中。 此外,可以选择在诸如SSB混频器,PLL或VCO的另一电路中生成的高频信号,以通过选择器输入到注入锁定正交VCO中。

    Source coupled differential complementary colpitts oscillator
    6.
    发明授权
    Source coupled differential complementary colpitts oscillator 失效
    源耦合差分互补colpitts振荡器

    公开(公告)号:US07420429B2

    公开(公告)日:2008-09-02

    申请号:US11600732

    申请日:2006-11-17

    IPC分类号: H03B5/12

    CPC分类号: H03B5/1212 H03B5/1228

    摘要: A source coupled differential complementary Colpitts oscillator is described, which enables a differential oscillation and also can improve phase noise performance by source-coupling a complementary Colpitts oscillator using an inductor. A differential complementary Colpitts oscillator includes: a plurality of complementary Colpitts oscillators and a source coupler which couples a source node of the plurality of complementary Colpitts oscillators, enables the Colpitts oscillators to differentially oscillate.

    摘要翻译: 描述了源耦合差分互补Colpitts振荡器,其实现差分振荡,并且还可以通过使用电感器源耦合互补Colpitts振荡器来改善相位噪声性能。 差分互补Colpitts振荡器包括:多个互补的Colpitts振荡器和耦合多个互补Colpitts振荡器的源节点的源耦合器使得Colpitts振荡器能够差分振荡。

    Source coupled differential complementary colpitts oscillator
    7.
    发明申请
    Source coupled differential complementary colpitts oscillator 失效
    源耦合差分互补colpitts振荡器

    公开(公告)号:US20070257742A1

    公开(公告)日:2007-11-08

    申请号:US11600732

    申请日:2006-11-17

    IPC分类号: H03B5/08

    CPC分类号: H03B5/1212 H03B5/1228

    摘要: A source coupled differential complementary Colpitts oscillator is described, which enables a differential oscillation and also can improve phase noise performance by source-coupling a complementary Colpitts oscillator using an inductor. A differential complementary Colpitts oscillator includes: a plurality of complementary Colpitts oscillators and a source coupler which couples a source node of the plurality of complementary Colpitts oscillators, enables the Colpitts oscillators to differentially oscillate.

    摘要翻译: 描述了源耦合差分互补Colpitts振荡器,其实现差分振荡,并且还可以通过使用电感器源耦合互补Colpitts振荡器来改善相位噪声性能。 差分互补Colpitts振荡器包括:多个互补的Colpitts振荡器和耦合多个互补Colpitts振荡器的源节点的源耦合器使得Colpitts振荡器能够差分振荡。

    Frequency synthesizing apparatus and method having injection-locked quadrature VCO in RF transceiver
    8.
    发明申请
    Frequency synthesizing apparatus and method having injection-locked quadrature VCO in RF transceiver 有权
    RF收发器中具有注入锁相正交VCO的频率合成装置和方法

    公开(公告)号:US20070159259A1

    公开(公告)日:2007-07-12

    申请号:US11447887

    申请日:2006-06-07

    IPC分类号: H03L7/00

    CPC分类号: H03L7/24 H03B21/02 H03L7/0995

    摘要: A frequency synthesizing apparatus and method having an injection-locked quadrature VCO in an RF transceiver is provided. In the frequency synthesizer, an I signal following a frequency of a high frequency signal that is input using the injection-locked quadrature VCO and a Q signal thereof are simultaneously generated to have an appropriate driving power. Accordingly, the I signal and the Q signal thereof that are generated in the injection-locked quadrature VCO may be utilized as a local signal for frequency up/down-conversion, without being buffered. An output of an SSB mixer may be directly input into the injection-locked quadrature VCO. Also, high frequency signals that are generated in another circuit such as the SSB mixer, a PLL, or a VCO may be selected to be input into the injection-locked quadrature VCO by a selector.

    摘要翻译: 提供了一种在RF收发器中具有注入锁定正交VCO的频率合成装置和方法。 在频率合成器中,同时产生跟随使用注入锁定正交VCO输入的高频信号的频率的I信号及其Q信号以具有适当的驱动功率。 因此,在注入锁定正交VCO中产生的I信号和Q信号可以用作用于上变频/下变频的本地信号,而不被缓冲。 SSB混频器的输出可以直接输入到注入锁相正交VCO中。 此外,可以选择在诸如SSB混频器,PLL或VCO的另一电路中生成的高频信号,以通过选择器输入到注入锁定正交VCO中。