公开(公告)号：US07795099B2

公开(公告)日：2010-09-14

申请号：US11979748

申请日：2007-11-08

申请人： Hyun-jae Kang ,  Ji-young Lee ,  Han-ku Cho ,  Gi-sung Yeo

发明人： Hyun-jae Kang ,  Ji-young Lee ,  Han-ku Cho ,  Gi-sung Yeo

IPC分类号： H01L21/762

CPC分类号： H01L29/7851 ,  H01L29/66795

摘要： A semiconductor device having a fin type active area includes a plurality of active regions, a first device isolation layer and a recessed second device isolation layer disposed in a direction of gate electrodes of the semiconductor device. A recessed second device isolation layer and a first device isolation layer are disposed in a vertical direction of the gate electrodes. The first device isolation layer and the plurality of active regions are alternately disposed in a first direction of the plurality of active regions.

摘要翻译： 具有翅片型有源区的半导体器件包括沿着半导体器件的栅电极的方向设置的多个有源区，第一器件隔离层和凹陷的第二器件隔离层。 凹陷的第二器件隔离层和第一器件隔离层设置在栅电极的垂直方向上。 第一器件隔离层和多个有源区交替地设置在多个有源区的第一方向上。

公开(公告)号：US20080105931A1

公开(公告)日：2008-05-08

申请号：US11979748

申请日：2007-11-08

申请人： Hyun-jae Kang ,  Ji-young Lee ,  Han-ku Cho ,  Gi-sung Yeo

发明人： Hyun-jae Kang ,  Ji-young Lee ,  Han-ku Cho ,  Gi-sung Yeo

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/7851 ,  H01L29/66795

摘要： A semiconductor device having a fin type active area includes a plurality of active regions, a first device isolation layer and a recessed second device isolation layer disposed in a direction of gate electrodes of the semiconductor device. A recessed second device isolation layer and a first device isolation layer are disposed in a vertical direction of the gate electrodes. The first device isolation layer and the plurality of active regions are alternately disposed in a first direction of the plurality of active regions.

摘要翻译： 具有翅片型有源区的半导体器件包括沿着半导体器件的栅电极的方向设置的多个有源区，第一器件隔离层和凹陷的第二器件隔离层。 凹陷的第二器件隔离层和第一器件隔离层设置在栅电极的垂直方向上。 第一器件隔离层和多个有源区交替地设置在多个有源区的第一方向上。

公开(公告)号：US08242018B2

公开(公告)日：2012-08-14

申请号：US12943142

申请日：2010-11-10

申请人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

发明人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

IPC分类号： H01L21/44

CPC分类号： H01L21/76816 ,  H01L21/76897

摘要： A semiconductor device has a structure of contacts whose size and pitch are finer that those that can be produced under the resolution provided by conventional photolithography. The contact structure includes a semiconductor substrate, an interlayer insulating layer disposed on the substrate, annular spacers situated in the interlayer insulating layer, first contacts surrounded by the spacers, and a second contact buried in the interlayer insulating layer between each adjacent pair of the first spacers. The contact structure is formed by forming first contact holes in the interlayer insulating layer, forming the spacers over the sides of the first contact holes to leave second contact holes within the first contact holes, etching the interlayer insulating layer from between the spacers using the first spacers as an etch mask to form third contact holes, and filling the first and second contact holes with conductive material. In this way, the pitch of the contacts can be half that of the first contact holes.

摘要翻译： 半导体器件具有接触的结构，其尺寸和间距比通过常规光刻提供的分辨率可以产生的那些更小。 所述接触结构包括半导体衬底，设置在所述衬底上的层间绝缘层，位于所述层间绝缘层中的环形间隔物，被所述间隔物包围的第一接触部以及埋在所述层间绝缘层中的每个相邻的所述第一接触层 间隔物 接触结构通过在层间绝缘层中形成第一接触孔而形成，在第一接触孔的侧面上形成间隔物以在第一接触孔内留下第二接触孔，使用第一接触孔从间隔物之间​​蚀刻层间绝缘层 间隔物作为蚀刻掩模以形成第三接触孔，并且用导电材料填充第一和第二接触孔。 以这种方式，触点的间距可以是第一接触孔的间距的一半。

公开(公告)号：US07855408B2

公开(公告)日：2010-12-21

申请号：US11367436

申请日：2006-03-06

申请人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

发明人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

IPC分类号： H01L27/108 ,  H01L29/76 ,  H01L29/94 ,  H01L31/119 ,  H01L29/788 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L21/76816 ,  H01L21/76897

摘要： A semiconductor device has a structure of contacts whose size and pitch are finer that those that can be produced under the resolution provided by conventional photolithography. The contact structure includes a semiconductor substrate, an interlayer insulating layer disposed on the substrate, annular spacers situated in the interlayer insulating layer, first contacts surrounded by the spacers, and a second contact buried in the interlayer insulating layer between each adjacent pair of the first spacers. The contact structure is formed by forming first contact holes in the interlayer insulating layer, forming the spacers over the sides of the first contact holes to leave second contact holes within the first contact holes, etching the interlayer insulating layer from between the spacers using the first spacers as an etch mask to form third contact holes, and filling the first and second contact holes with conductive material. In this way, the pitch of the contacts can be half that of the first contact holes.

摘要翻译： 半导体器件具有接触的结构，其尺寸和间距比通过常规光刻提供的分辨率可以产生的那些更小。 所述接触结构包括半导体衬底，设置在所述衬底上的层间绝缘层，位于所述层间绝缘层中的环形间隔物，被所述间隔物包围的第一接触部以及埋在所述层间绝缘层中的每个相邻的所述第一接触层 间隔物 接触结构通过在层间绝缘层中形成第一接触孔而形成，在第一接触孔的侧面上形成间隔物以在第一接触孔内留下第二接触孔，使用第一接触孔从间隔物之间​​蚀刻层间绝缘层 间隔物作为蚀刻掩模以形成第三接触孔，并且用导电材料填充第一和第二接触孔。 以这种方式，触点的间距可以是第一接触孔的间距的一半。

公开(公告)号：US20110076846A1

公开(公告)日：2011-03-31

申请号：US12943142

申请日：2010-11-10

申请人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

发明人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

IPC分类号： H01L21/283

CPC分类号： H01L21/76816 ,  H01L21/76897

摘要： A semiconductor device has a structure of contacts whose size and pitch are finer that those that can be produced under the resolution provided by conventional photolithography. The contact structure includes a semiconductor substrate, an interlayer insulating layer disposed on the substrate, annular spacers situated in the interlayer insulating layer, first contacts surrounded by the spacers, and a second contact buried in the interlayer insulating layer between each adjacent pair of the first spacers. The contact structure is formed by forming first contact holes in the interlayer insulating layer, forming the spacers over the sides of the first contact holes to leave second contact holes within the first contact holes, etching the interlayer insulating layer from between the spacers using the first spacers as an etch mask to form third contact holes, and filling the first and second contact holes with conductive material. In this way, the pitch of the contacts can be half that of the first contact holes.

摘要翻译： 半导体器件具有接触的结构，其尺寸和间距比通过常规光刻提供的分辨率可以产生的那些更小。 所述接触结构包括半导体衬底，设置在所述衬底上的层间绝缘层，位于所述层间绝缘层中的环形间隔物，被所述间隔物包围的第一接触部以及埋在所述层间绝缘层中的每个相邻的所述第一接触层 间隔物 接触结构通过在层间绝缘层中形成第一接触孔而形成，在第一接触孔的侧面上形成间隔物以在第一接触孔内留下第二接触孔，使用第一接触孔从间隔物之间​​蚀刻层间绝缘层 间隔物作为蚀刻掩模以形成第三接触孔，并且用导电材料填充第一和第二接触孔。 以这种方式，触点的间距可以是第一接触孔的间距的一半。

公开(公告)号：US20060231900A1

公开(公告)日：2006-10-19

申请号：US11367436

申请日：2006-03-06

申请人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

发明人： Ji-young Lee ,  Hyun-jae Kang ,  Sang-gyun Woo

IPC分类号： H01L23/52 ,  H01L21/4763

CPC分类号： H01L21/76816 ,  H01L21/76897

摘要： A semiconductor device has a structure of contacts whose size and pitch are finer that those that can be produced under the resolution provided by conventional photolithography. The contact structure includes a semiconductor substrate, an interlayer insulating layer disposed on the substrate, annular spacers situated in the interlayer insulating layer, first contacts surrounded by the spacers, and a second contact buried in the interlayer insulating layer between each adjacent pair of the first spacers. The contact structure is formed by forming first contact holes in the interlayer insulating layer, forming the spacers over the sides of the first contact holes to leave second contact holes within the first contact holes, etching the interlayer insulating layer from between the spacers using the first spacers as an etch mask to form third contact holes, and filling the first and second contact holes with conductive material. In this way, the pitch of the contacts can be half that of the first contact holes.

摘要翻译： 半导体器件具有接触的结构，其尺寸和间距比通过常规光刻提供的分辨率可以产生的那些更小。 所述接触结构包括半导体衬底，设置在所述衬底上的层间绝缘层，位于所述层间绝缘层中的环形间隔物，被所述间隔物包围的第一接触部以及埋在所述层间绝缘层中的每个相邻的所述第一接触层 间隔物 接触结构通过在层间绝缘层中形成第一接触孔而形成，在第一接触孔的侧面上形成间隔物以在第一接触孔内留下第二接触孔，使用第一接触孔从间隔物之间​​蚀刻层间绝缘层 间隔物作为蚀刻掩模以形成第三接触孔，并且用导电材料填充第一和第二接触孔。 以这种方式，触点的间距可以是第一接触孔的间距的一半。