公开(公告)号：US20240324103A1

公开(公告)日：2024-09-26

申请号：US18613202

申请日：2024-03-22

Applicant: IBIDEN CO., LTD.

Inventor： Masashi KUWABARA ,  Jun SAKAI ,  Shiho FUKUSHIMA

IPC: H05K1/11 ,  H05K1/03 ,  H05K3/16

CPC classification number: H05K1/115 ,  H05K1/0306 ,  H05K3/16 ,  H05K2201/0209 ,  H05K2201/0242 ,  H05K2201/0266 ,  H05K2201/032 ,  H05K2201/09536

Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a first resin insulating layer, a first conductor layer including a seed layer and an electrolytic plating layer, a via conductor formed such that the via conductor electrically connects the through-hole conductor and first conductor layer, and a second resin insulating layer covering the first conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is penetrating through the glass substrate, the seed layer includes a first layer formed on the first resin insulating layer and a second layer formed on the first layer, and the first conductor layer includes a conductor circuit such that a width of the first layer is larger than a width of the second layer in the conductor circuit and a width of the electrolytic plating layer is larger than the width of the first layer in the conductor circuit.