Monolithic semiconductor memory
    1.
    发明授权
    Monolithic semiconductor memory 失效
    单片半导体存储器

    公开(公告)号:US3643235A

    公开(公告)日:1972-02-15

    申请号:US3643235D

    申请日:1969-12-05

    Applicant: IBM

    Abstract: This specification discloses a storage cell which employs inversely operated and transverse transistors to reduce storage cell size accessing times and power consumption when the cell is fabricated in monolithic form. Two cross-connected transistors are inversely operated so that they share a common emitter region with a separate base region and collector region for each of the cross-connected transistors. In this way, the transistors can be fabricated in a single diffusion region. The collector of each of the cross-connected transistors is connected to the collector of a load transistor of the opposite type transistor and to the base of an addressing transistor having its emitter connected to the sense line and its collector connected to the base of the load transistors. The two addressing and load transistors are formed in a single isolation zone with collector and base regions of the addressing transistors serving also as the base and collector regions respectively of the load transistors which are fabricated as transverse transistors with a common emitter region.

    Abstract translation: 本说明书公开了一种存储单元,其使用反向操作和横向晶体管来减小当单元以单体形式制造存储单元尺寸时的存取时间和功耗。 两个交叉连接的晶体管被​​反向工作,使得它们共享具有用于每个交叉连接的晶体管的单独的基极区域和集电极区域的公共发射极区域。 以这种方式,可以在单个扩散区域中制造晶体管。 每个交叉连接的晶体管的集电极连接到相对型晶体管的负载晶体管的集电极,并连接到寻址晶体管的基极,其发射极连接到感测线,其集电极连接到负载的基极 晶体管。 两个寻址和负载晶体管形成在单个隔离区域中,寻址晶体管的集电极和基极区域也分别用作负载晶体管的基极和集电极区域,这些区域被制造为具有公共发射极区域的横向晶体管。

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