Layout to reduce current crowding at endpoints

    公开(公告)号:US11777018B2

    公开(公告)日:2023-10-03

    申请号:US17523513

    申请日:2021-11-10

    申请人: IDEAL POWER INC.

    IPC分类号: H01L29/06 H01L29/732

    CPC分类号: H01L29/732

    摘要: Layout to reduce current crowding at endpoints. At least one example is a semiconductor device comprising: an emitter region defining an inner boundary in the shape of an obround with parallel sides, and the obround having hemispherical ends each having a radius; a base region having a first end, a second end opposite the first end, and base length, the base region disposed within the obround with the base length parallel to and centered between the parallel sides, the first end spaced apart from the first hemispherical end by a first gap greater than the radius, and the second end spaced apart from the second hemispherical ends by a second gap greater than the radius.

    Method and system of operating a bi-directional double-base bipolar junction transistor (B-TRAN)

    公开(公告)号:US11411557B2

    公开(公告)日:2022-08-09

    申请号:US17317466

    申请日:2021-05-11

    申请人: IDEAL POWER INC.

    发明人: Alireza Mojab

    IPC分类号: H03K17/66 H01L29/747

    摘要: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.

    Method and system of operating a bi-directional double-base bipolar junction transistor (B-TRAN)

    公开(公告)号:US11804835B2

    公开(公告)日:2023-10-31

    申请号:US17530981

    申请日:2021-11-19

    申请人: IDEAL POWER INC.

    发明人: Alireza Mojab

    IPC分类号: H03K17/66 H01L29/747

    CPC分类号: H03K17/668 H01L29/747

    摘要: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: injecting charge carriers at a first rate into an upper base of the transistor, the injecting at the first rate results in current flow through the transistor from an upper collector-emitter to a lower collector-emitter, and the current flow results in first voltage drop measured across the upper collector-emitter and the lower collector-emitter; and then, within a predetermined period of time before the end of a first conduction period of the transistor, injecting charge carriers into the upper base at a second rate lower than the first rate, the injecting at the second rate results in second voltage drop measured across the upper collector-emitter and the lower collector-emitter, the second voltage drop higher than the first voltage drop; and then making the transistor non-conductive at the end of the conduction period.

    Method and system of operating a bi-directional double-base bipolar junction transistor (B-TRAN)

    公开(公告)号:US11522051B2

    公开(公告)日:2022-12-06

    申请号:US17537726

    申请日:2021-11-30

    申请人: IDEAL POWER INC.

    摘要: Operating a bi-directional double-base bipolar junction transistor (B-TRAN). One example is a method comprising: conducting a first load current from an upper terminal of the power module to an upper collector-emitter of the transistor, through the transistor, and from a lower collector-emitter to a lower terminal of the power module; and then responsive assertion of a first interrupt signal, interrupting the first load current from the lower collector-emitter to the lower terminal by opening a lower-main FET and thereby commutating a first shutoff current through a lower base of the transistor to the lower terminal; and blocking current from the upper terminal to the lower terminal by the transistor.

    Method and system of current sharing among bidirectional double-base bipolar junction transistors

    公开(公告)号:US11496129B2

    公开(公告)日:2022-11-08

    申请号:US17340604

    申请日:2021-06-07

    申请人: IDEAL POWER INC.

    发明人: Alireza Mojab

    摘要: Current sharing among bidirectional double-base bipolar junction transistors. One example is a method comprising: conducting current through a first bidirectional double-base bipolar junction transistor (first B-TRAN); conducting current through a second B-TRAN the second B-TRAN coupled in parallel with the first B-TRAN; measuring a value indicative of conduction of the first B-TRAN, and measuring a value indicative of conduction of the second B-TRAN; and adjusting a current flow through the first B-TRAN, the adjusting responsive to the value indicative of conduction of the first B-TRAN being different than the value indicative of conduction of the second B-TRAN.