公开(公告)号：US20220238388A1

公开(公告)日：2022-07-28

申请号：US17580020

申请日：2022-01-20

Applicant: IMEC vzw

Inventor： Gaspard HIBLOT ,  Anshul GUPTA ,  Geert VAN DER PLAS

IPC: H01L21/8234 ,  H01L27/088

Abstract: A method of producing a gate cut in a semiconductor component is provided. In one aspect, an array of nano-sized semiconductor fins is processed on a semiconductor substrate. Rails may be buried in the substrate and in a layer of dielectric material that isolates neighboring fins from each other. The rails may extend in the direction of the fins and each rail may be situated between two adjacent fins. The rails may be buried power rails for enabling the formation of a power delivery network at the back of an integrated circuit chip. At the front side of the substrate, one or more gate structures are produced. The gate structures extend transversally, or perpendicularly, with respect to the fins and the rails. A gate cut is produced by forming an opening from the back side of the substrate, and removing a portion of the gate structure at the bottom of the opening, thereby creating a gate cut that is aligned to the sidewalls of the rail. In another aspect, a semiconductor component, such as an integrated circuit, includes a gate cut that is aligned to the sidewalls of a buried contact rail.

公开(公告)号：US20240038589A1

公开(公告)日：2024-02-01

申请号：US17877500

申请日：2022-07-29

Applicant: IMEC VZW

Inventor： Anna Yurievna HERR ,  Quentin Paul HERR ,  Zsolt TOKEI ,  Anshul GUPTA

IPC: H01L21/768 ,  H01L23/522

CPC classification number: H01L21/76897 ,  H01L21/76885 ,  H01L23/5226 ,  H01L23/53285

Abstract: A method for forming a superconducting interconnect structure, comprising: providing a substrate, forming a superconductive layer, forming a layer of a first dielectric material, removing parts of the layer of the first dielectric material and of the superconductive layer so as to form a pattern comprising a first set of line structures comprising: a first set of superconductive line structures, and a first set of line structures made of the first dielectric material, forming a second dielectric material between the line structures of the first set, forming a layer formed of a third dielectric material, providing a patterned mask, transferring the pattern into the first dielectric material and into the layer formed of the third dielectric material, so as to form the at least one via hole, removing the patterned mask, and forming a superconductive material layer so as to form at least one via.