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公开(公告)号:US09741848B2
公开(公告)日:2017-08-22
申请号:US15337776
申请日:2016-10-28
Applicant: IMEC VZW
Inventor: Mohammad Ali Pourghaderi , AliReza Alian
IPC: H01L29/02 , H01L29/78 , H01L29/08 , H01L29/10 , H01L29/423
CPC classification number: H01L29/7831 , H01L29/0847 , H01L29/1033 , H01L29/42376 , H01L29/4983 , H01L29/4991 , H01L29/512 , H01L29/7391
Abstract: A Tunnel Field-Effect Transistor (TFET) is provided comprising a source-channel-drain structure of a semiconducting material. The source-channel-drain structure comprises a source region being n-type or p-type doped, a drain region oppositely doped than the source region and an intrinsic or lowly doped channel region situated between the source region and the drain region. The TFET further comprises a reference gate structure covering the channel region and a source-side gate structure aside of the reference gate structure wherein the work function and/or electrostatic potential of the source-side gate structure and the reference work function and/or electrostatic potential of the reference gate structure are selected for allowing the tunneling mechanism of the TFET device in operation to occur at the interface or interface region between the source-side gate structure and the reference gate structure in the channel region.
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公开(公告)号:US20170179283A1
公开(公告)日:2017-06-22
申请号:US15337776
申请日:2016-10-28
Applicant: IMEC VZW
Inventor: Mohammad Ali Pourghaderi , AliReza Alian
IPC: H01L29/78 , H01L29/10 , H01L29/423 , H01L29/08
CPC classification number: H01L29/7831 , H01L29/0847 , H01L29/1033 , H01L29/42376 , H01L29/4983 , H01L29/4991 , H01L29/512 , H01L29/7391
Abstract: A Tunnel Field-Effect Transistor (TFET) is provided comprising a source-channel-drain structure of a semiconducting material. The source-channel-drain structure comprises a source region being n-type or p-type doped, a drain region oppositely doped than the source region and an intrinsic or lowly doped channel region situated between the source region and the drain region. The TFET further comprises a reference gate structure covering the channel region and a source-side gate structure aside of the reference gate structure wherein the work function and/or electrostatic potential of the source-side gate structure and the reference work function and/or electrostatic potential of the reference gate structure are selected for allowing the tunneling mechanism of the TFET device in operation to occur at the interface or interface region between the source-side gate structure and the reference gate structure in the channel region.
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