公开(公告)号：US09601379B1

公开(公告)日：2017-03-21

申请号：US14757996

申请日：2015-12-23

Applicant: GLOBALFOUNDRIES Inc. ,  IMEC VZW

Inventor： Bartlomiej Jan Pawlak ,  Dmitry Yakimets ,  Pieter Schuddinck

IPC: H01L29/06 ,  H01L21/8234 ,  H01L21/265 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/308 ,  H01L29/423 ,  H01L23/532 ,  H01L27/088

CPC classification number: H01L29/0673 ,  B82Y10/00 ,  H01L23/53214 ,  H01L23/53228 ,  H01L23/53242 ,  H01L23/53257 ,  H01L29/0653 ,  H01L29/41725 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775

Abstract: In one example, the method disclosed herein includes, among other things, forming a sacrificial structure around a plurality of stacked substantially un-doped nanowires at a location that corresponds to the channel region of the device, performing a selective etching process through a cavity to remove a second plurality of nanowires from the channel region and the source/drain regions of the device while leaving a first plurality of nanowires in position, and forming a metal conductive source/drain contact structure in each of the source/drain regions, wherein each of the metal conductive source/drain contact structures is positioned all around the first plurality of nanowires positioned in the source/drain regions.

公开(公告)号：US10957575B2

公开(公告)日：2021-03-23

申请号：US16718624

申请日：2019-12-18

Applicant: IMEC vzw

Inventor： Dmitry Yakimets ,  Anshul Gupta

IPC: H01L21/70 ,  H01L21/74 ,  H01L21/311 ,  H01L21/48 ,  H01L21/768 ,  H01L23/31 ,  H01L23/528 ,  H01L23/535

Abstract: An integrated circuit chip having fin-based active devices in the front end of line, and an electrical connection between a buried interconnect rail and a contact area on a semiconductor fin, such as an epitaxially grown source or drain contact area of a transistor, is disclosed. In one aspect, the electrical connection is realized without the intervention of a metallization level formed above the active devices in the IC. Instead, an interconnect via is produced between the buried interconnect rail and a lateral portion of the contact area, wherein the lateral portion is directly contacted by a sidewall of the interconnect via. Methods for producing the interconnect via are also disclosed.