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公开(公告)号:US20180098136A1
公开(公告)日:2018-04-05
申请号:US15281233
申请日:2016-09-30
Applicant: Intel Corporation
Inventor: RAMAMURTHY KRITHIVAS , DONGLAI DAI , RUSSELL WUNDERLICH , ESWARAMOORTHI NALLUSAMY
IPC: H04Q9/00
CPC classification number: H04Q9/00 , H04Q9/04 , H04Q2209/826 , H04Q2209/845
Abstract: The present disclosure is directed to push telemetry data accumulation. A system may comprise at least telemetry circuitry configured to push telemetry data (e.g., provide telemetry data without first receiving a request). An example system may comprise one or more devices that include at least one set of telemetry circuitry. The at least one set of telemetry circuitry may be configured to push data based at least on a frequency configuration and a skew configuration. The frequency configuration may control how often the at least one set of telemetry circuitry generates data. The skew configuration may control when the telemetry data is transmitted. For example, sets of telemetry circuitry may be configured with different skew configurations to minimize transmission overlap. This may prevent telemetry data accumulation (TDA) circuitry in the system, which receives the transmission of telemetry data from the at least one set of telemetry circuitry, from becoming overwhelmed.
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2.
公开(公告)号:US20190094946A1
公开(公告)日:2019-03-28
申请号:US15719276
申请日:2017-09-28
Applicant: INTEL CORPORATION
Inventor: BHARAT S. PILLILLI , ESWARAMOORTHI NALLUSAMY , RAMAMURTHY KRITHIVAS , VIVEK GARG , VENKATESH RAMAMURTHY
Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to send a power operation initiation indication to the accelerator device via the subset of the plurality of interconnects, the power operation initiation indication to indicate a power operation to be performed on one or more infrastructure devices, receive a response the accelerator device, the response to indicate to the processor that the accelerator is ready for the power operation, and ucause the power operation to be performed on the accelerator device, the power operation to enable or disable power for the one or more of the infrastructure devices.
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公开(公告)号:US20160179383A1
公开(公告)日:2016-06-23
申请号:US14580008
申请日:2014-12-22
Applicant: Intel Corporation
Inventor: RAMAMURTHY KRITHIVAS , ESWARAMOORTHI NALLUSAMY , MARK A. SCHMISSEUR
CPC classification number: G06F12/0692 , G06F9/45541 , G06F9/5077 , G06F2212/1041 , G06F2212/657
Abstract: Apparatus, systems, and methods to implement a virtual serial presence detect operation for pooled memory are described. In one embodiment, a controller comprises logic to receive a request to establish a composed computing device, define a plurality of virtual memory devices to be associated with a composed computing device, allocate memory from a shared pool of physical memory to the plurality of virtual memory devices, create a plurality of virtual serial detects (vSPDs) for the plurality of virtual memory devices, and store the plurality of vSPDs in a linked list in an operational memory device. Other embodiments are also disclosed and claimed.
Abstract translation: 描述了用于实现池存储器的虚拟串行存在检测操作的装置,系统和方法。 在一个实施例中,控制器包括接收建立组合计算设备的请求的逻辑,定义要与组合计算设备相关联的多个虚拟存储器设备,将存储器从物理存储器的共享池分配给多个虚拟存储器 设备,为多个虚拟存储设备创建多个虚拟串行检测(vSPD),并将多个vSPD存储在操作存储器设备中的链表中。 还公开并要求保护其他实施例。
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