公开(公告)号：US20150222516A1

公开(公告)日：2015-08-06

申请号：US13976964

申请日：2012-12-18

Applicant: Jim DAUBERT ,  INTEL CORPORATION

Inventor： Manasi Deval ,  Jim Daubert ,  Eric Mann ,  Cong Li ,  Muralidhar Murali Rajappa ,  Anjaneya Reddy Chagam Reddy ,  David Wescott ,  Ramkumar Nagappan ,  Raed Kanjo

IPC: H04L12/26 ,  H04L12/851 ,  H04L12/24 ,  H04L12/931 ,  H04L1/16 ,  H04L29/06

CPC classification number: H04L43/0888 ,  H04L1/1678 ,  H04L41/12 ,  H04L41/5032 ,  H04L43/0882 ,  H04L43/0894 ,  H04L43/106 ,  H04L47/2425 ,  H04L49/354 ,  H04L67/1029 ,  H04L67/148 ,  H04L69/161 ,  H04L69/22 ,  H04L69/28

Abstract: Examples are disclosed for determining or using server transaction latency information. In some examples, a network input/output device coupled to a server may be capable of time stamping information related to ingress request and egress response packets for a transaction. For these examples, elements of the server may be capable of determining transaction latency values based on the time stamped information. The determined transaction latency values may be used to monitor or manage operating characteristics of the server to include an amount of power provided to the server or an ability of the server to support one or more virtual servers. Other examples are described and claimed.

Abstract translation: 公开了用于确定或使用服务器事务延迟信息的示例。 在一些示例中，耦合到服务器的网络输入/输出设备可能能够时间标记与用于事务的入口请求和出口响应分组有关的信息。 对于这些示例，服务器的元件可以能够基于时间戳信息来确定事务等待时间值。 确定的事务延迟值可以用于监视或管理服务器的操作特性，以包括提供给服务器的功率量或服务器支持一个或多个虚拟服务器的能力。 其他的例子被描述和要求保护。

公开(公告)号：US11502952B2

公开(公告)日：2022-11-15

申请号：US15969017

申请日：2018-05-02

Applicant: Intel Corporation

Inventor： Anil Vasudevan ,  Parthasarathy Sarangam ,  Eric Mann ,  Daniel Cohn

IPC: H04L1/00 ,  H04L45/74 ,  H04L47/11 ,  H04L47/52 ,  H04L47/50 ,  H04L45/00

Abstract: Devices and techniques for reorder resilient transport are described herein. A device may store data packets in sequential positions of a flow queue in an order in which the data packets were received. The device may retrieve a first data packet from a first sequential position and a second data packet from a second sequential position that is next in sequence to the first sequential position in the flow queue. The device may store the first data packet and the second data packet in a buffer and refrain from providing the first data packet and the second data packet to upper layer circuitry if the packet order information for the first data packet and the second data packet indicate that the first data packet and the second data packet were received out of order. Other embodiments are also described.

公开(公告)号：US09979640B2

公开(公告)日：2018-05-22

申请号：US14580981

申请日：2014-12-23

Applicant: Intel Corporation

Inventor： Anil Vasudevan ,  Parthasarathy Sarangam ,  Eric Mann ,  Daniel Cohn

IPC: G06F11/00 ,  H04L12/741 ,  H04L12/801 ,  H04L12/873 ,  H04L12/863 ,  H04L12/721

CPC classification number: H04L45/74 ,  H04L45/38 ,  H04L47/115 ,  H04L47/52 ,  H04L47/54

Abstract: Devices and techniques for reorder resilient transport are described herein. A device may store data packets in sequential positions of a flow queue in an order in which the data packets were received. The device may retrieve a first data packet from a first sequential position and a second data packet from a second sequential position that is next in sequence to the first sequential position in the flow queue. The device may store the first data packet and the second data packet in a buffer and refrain from providing the first data packet and the second data packet to upper layer circuitry if the packet order information for the first data packet and the second data packet indicate that the first data packet and the second data packet were received out of order. Other embodiments are also described.

公开(公告)号：US20180351861A1

公开(公告)日：2018-12-06

申请号：US15969017

申请日：2018-05-02

Applicant: Intel Corporation

Inventor： Anil Vasudevan ,  Parthasarathy Sarangam ,  Eric Mann ,  Daniel Cohn

IPC: H04L12/741 ,  H04L12/721 ,  H04L12/863 ,  H04L12/801 ,  H04L12/873

CPC classification number: H04L45/74 ,  H04L45/38 ,  H04L47/115 ,  H04L47/52 ,  H04L47/54

Abstract: Devices and techniques for reorder resilient transport are described herein. A device may store data packets in sequential positions of a flow queue in an order in which the data packets were received. The device may retrieve a first data packet from a first sequential position and a second data packet from a second sequential position that is next in sequence to the first sequential position in the flow queue. The device may store the first data packet and the second data packet in a buffer and refrain from providing the first data packet and the second data packet to upper layer circuitry if the packet order information for the first data packet and the second data packet indicate that the first data packet and the second data packet were received out of order. Other embodiments are also described.

公开(公告)号：US09503347B2

公开(公告)日：2016-11-22

申请号：US13976964

申请日：2012-12-18

Applicant: INTEL CORPORATION

Inventor： Manasi Deval ,  Jim Daubert ,  Eric Mann ,  Cong Li ,  Muralidhar Murali Rajappa ,  Anjaneya Reddy Chagam Reddy ,  David Wescott ,  Ramkumar Nagappan ,  Raed Kanjo

IPC: G06F11/00 ,  H04J1/16 ,  H04L1/00 ,  H04L12/26 ,  H04L29/08 ,  H04L1/16 ,  H04L12/24 ,  H04L12/851 ,  H04L12/931 ,  H04L29/06

CPC classification number: H04L43/0888 ,  H04L1/1678 ,  H04L41/12 ,  H04L41/5032 ,  H04L43/0882 ,  H04L43/0894 ,  H04L43/106 ,  H04L47/2425 ,  H04L49/354 ,  H04L67/1029 ,  H04L67/148 ,  H04L69/161 ,  H04L69/22 ,  H04L69/28

Abstract: Examples are disclosed for determining or using server transaction latency information. In some examples, a network input/output device coupled to a server may be capable of time stamping information related to ingress request and egress response packets for a transaction. For these examples, elements of the server may be capable of determining transaction latency values based on the time stamped information. The determined transaction latency values may be used to monitor or manage operating characteristics of the server to include an amount of power provided to the server or an ability of the server to support one or more virtual servers. Other examples are described and claimed.

Abstract translation: 公开了用于确定或使用服务器事务延迟信息的示例。 在一些示例中，耦合到服务器的网络输入/输出设备可能能够时间标记与用于事务的入口请求和出口响应分组有关的信息。 对于这些示例，服务器的元件可以能够基于时间戳信息来确定事务等待时间值。 确定的事务延迟值可以用于监视或管理服务器的操作特性，以包括提供给服务器的功率量或服务器支持一个或多个虚拟服务器的能力。 其他的例子被描述和要求保护。