公开(公告)号：US10418464B2

公开(公告)日：2019-09-17

申请号：US15573168

申请日：2015-06-12

Applicant: INTEL CORPORATION

Inventor： Glenn A. Glass ,  Anand S. Murthy ,  Hei Kam ,  Tahir Ghani ,  Karthik Jambunathan ,  Chandra S. Mohapatra

IPC: H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L27/092 ,  H01L21/02 ,  H01L21/762 ,  H01L21/8256 ,  H01L29/08 ,  H01L21/8258 ,  H01L27/06

Abstract: Techniques are disclosed for forming transistors on the same substrate with varied channel materials. The techniques include forming a replacement material region in the substrate, such region used to form a plurality of fins therefrom, the fins used to form transistor channel regions. In an example case, the substrate may comprise Si and the replacement materials may include Ge, SiGe, and/or at least one III-V material. The replacement material regions can have a width sufficient to ensure a substantially planar interface between the replacement material and the substrate material. Therefore, the fins formed from the replacement material regions can also have a substantially planar interface between the replacement material and the substrate material. One example benefit from being able to form replacement material channel regions with such substantially planar interfaces can include at least a 30 percent improvement in current flow at a fixed voltage.

公开(公告)号：US10944006B2

公开(公告)日：2021-03-09

申请号：US16070262

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Glenn A. Glass ,  Anand S. Murthy ,  Karthik Jambunathan ,  Chandra S. Mohapatra ,  Hei Kam ,  Nabil G. Mistkawi ,  Jun Sung Kang ,  Biswajeet Guha

IPC: H01L21/308 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/06 ,  H01L29/66 ,  H01L29/10 ,  H01L29/775 ,  B82Y10/00 ,  H01L29/08 ,  H01L29/423 ,  H01L27/092 ,  H01L21/8258

Abstract: A trench is formed in an insulating layer to expose a native fin on a substrate. A replacement fin is deposited on the native fin in the trench. The replacement fin is trimmed laterally.

公开(公告)号：US10896907B2

公开(公告)日：2021-01-19

申请号：US16318361

申请日：2016-09-30

Applicant: Intel Corporation

Inventor： Patrick H. Keys ,  Hei Kam ,  Rishabh Mehandru ,  Aaron A. Budrevich

IPC: H01L27/092 ,  H01L21/8238 ,  H01L29/66 ,  H01L29/78 ,  H01L29/10 ,  H01L29/167 ,  H01L29/43 ,  H01L29/49

Abstract: A transistor including a gate stack and source and drain on opposing sides of the gate stack; and a first material and a second material on the substrate, the first material disposed between the substrate and the second material and the channel of the transistor is defined in the second material between the source and drain, wherein the first material and the second material each include an implant and the implant includes a greater solubility in the first material than in the second material. A method for forming an integrated circuit structure including forming a first material on a substrate; forming a second material on the first material; introducing an implant into the second material, wherein the implant includes a greater solubility in the first material than in the second material; annealing the substrate; and forming a transistor on the substrate, the transistor including a channel including the second material.