公开(公告)号：US11715787B2

公开(公告)日：2023-08-01

申请号：US17514058

申请日：2021-10-29

申请人： Intel Corporation

发明人： Mark Armstrong ,  Biswajeet Guha ,  Jun Sung Kang ,  Bruce Beattie ,  Tahir Ghani

IPC分类号： H01L29/66 ,  H01L21/265 ,  H01L21/266 ,  H01L21/306 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78

CPC分类号： H01L29/6681 ,  H01L21/266 ,  H01L21/26506 ,  H01L21/30604 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/7853

摘要： A method comprising: forming a substrate; forming a first nanowire over the substrate; forming a second nanowire over the substrate; forming a gate over a portion of the first and second nanowires; implanting a dopant such that a region between the first and second nanowires under the gate does not receive the dopant while a region between the first and second nanowires away from the gate receives the dopant, wherein the dopant amorphize a material of the region between the first and second nanowires away from the gate; and isotopically etching of the region between the first and second nanowires away from the gate.

公开(公告)号：US11205715B2

公开(公告)日：2021-12-21

申请号：US16632856

申请日：2017-08-21

申请人： Intel Corporation

发明人： Mark Armstrong ,  Biswajeet Guha ,  Jun Sung Kang ,  Bruce Beattie ,  Tahir Ghani

IPC分类号： H01L29/66 ,  H01L21/265 ,  H01L21/266 ,  H01L21/306 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78

摘要： A method comprising: forming a substrate; forming a first nanowire over the substrate; forming a second nanowire over the substrate; forming a gate over a portion of the first and second nanowires; implanting a dopant such that a region between the first and second nanowires under the gate does not receive the dopant while a region between the first and second nanowires away from the gate receives the dopant, wherein the dopant amorphize a material of the region between the first and second nanowires away from the gate; and isotopically etching of the region between the first and second nanowires away from the gate.

公开(公告)号：US11901458B2

公开(公告)日：2024-02-13

申请号：US17850799

申请日：2022-06-27

申请人： Intel Corporation

发明人： Bruce E. Beattie ,  Leonard Guler ,  Biswajeet Guha ,  Jun Sung Kang ,  William Hsu

IPC分类号： H01L29/78 ,  H01L21/8234 ,  H01L27/088 ,  H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66

CPC分类号： H01L29/7856 ,  H01L21/823418 ,  H01L21/823431 ,  H01L21/823468 ,  H01L27/0886 ,  H01L29/0649 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/42356 ,  H01L29/6681 ,  H01L29/66545 ,  H01L2029/7858

摘要： Gate all around semiconductor devices, such as nanowire or nanoribbon devices, are described that include a low dielectric constant (“low-k”) material disposed between a first nanowire closest to the substrate and the substrate. This configuration enables gate control over all surfaces of the nanowires in a channel region of a semiconductor device via the high-k dielectric material, while also preventing leakage current from the first nanowire into the substrate.

公开(公告)号：US11069795B2

公开(公告)日：2021-07-20

申请号：US16636206

申请日：2017-09-28

申请人： INTEL CORPORATION

发明人： Karthik Jambunathan ,  Glenn A. Glass ,  Anand S. Murthy ,  Jun Sung Kang ,  Bruce E. Beattie ,  Anupama Bowonder ,  Biswajeet Guha ,  Ju H. Nam ,  Tahir Ghani

IPC分类号： H01L21/8234 ,  H01L27/088 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

摘要： Integrated circuits include fins including an upper/channel region and a lower/sub-channel region, the lower region having a first chemical composition and opposing sidewalls adjacent to an insulator material, and the upper region having a second chemical composition. A first width indicates the distance between the opposing sidewalls of the lower region at a first location is at least 1 nm wider than a second width indicating the distance between the opposing sidewalls of the upper region at a second location, the first location being within 10 nm of the second location (or otherwise relatively close to one another). The first chemical composition is distinct from the second chemical composition and includes a surface chemical composition at an outer surface of the opposing sidewalls of the lower region and a bulk chemical composition therebetween, the surface chemical composition including one or more of oxygen, nitrogen, carbon, chlorine, fluorine, and sulfur.

公开(公告)号：US20190393350A1

公开(公告)日：2019-12-26

申请号：US16013329

申请日：2018-06-20

申请人： INTEL CORPORATION

发明人： Erica J. Thompson ,  Aditya Kasukurti ,  Jun Sung Kang ,  Kai Loon Cheong ,  Biswajeet Guha ,  William Hsu ,  Bruce Beattie

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66

摘要： A nanowire device includes one or more nanowire having a first end portion, a second end portion, and a body portion between the first end portion and the second end portion. A first conductive structure is in contact with the first end portion and a second conductive structure is in contact with the second end portion. The body portion of the nanowire has a first cross-sectional shape and the first end portion has a second cross-sectional shape different from the first cross-sectional shape. Integrated circuits including the nanowire device and a method of cleaning a semiconductor structure are also disclosed.

公开(公告)号：US11929396B2

公开(公告)日：2024-03-12

申请号：US17725471

申请日：2022-04-20

申请人： INTEL CORPORATION

发明人： William Hsu ,  Biswajeet Guha ,  Leonard Guler ,  Souvik Chakrabarty ,  Jun Sung Kang ,  Bruce Beattie ,  Tahir Ghani

IPC分类号： H01L29/06 ,  B82Y10/00 ,  H01L21/8238 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC分类号： H01L29/0673 ,  H01L21/823821 ,  H01L29/0653 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/785 ,  B82Y10/00

摘要： A transistor structure includes a base and a body over the base. The body comprises a semiconductor material and has a first end portion and a second end portion. A gate structure is wrapped around the body between the first end portion and the second end portion, where the gate structure includes a gate electrode and a dielectric between the gate electrode and the body. A source is in contact with the first end portion and a drain is in contact with the second end portion. A first spacer material is on opposite sides of the gate electrode and above the first end portion. A second spacer material is adjacent the gate structure and under the first end portion of the nanowire body. The second spacer material is below and in contact with a bottom surface of the source and the drain.

公开(公告)号：US11276691B2

公开(公告)日：2022-03-15

申请号：US16134824

申请日：2018-09-18

申请人： Intel Corporation

发明人： Biswajeet Guha ,  Jun Sung Kang ,  Bruce Beattie ,  Stephen M. Cea ,  Tahir Ghani

IPC分类号： H01L27/088 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

摘要： Gate-all-around integrated circuit structures having self-aligned source or drain undercut for varied widths are described. In an example, a structure includes first and second vertical arrangements of nanowires above a substrate, the nanowires of the second vertical arrangement of nanowires having a horizontal width greater than a horizontal width of the nanowires of the first vertical arrangement of nanowires. First and second gate stack portions are over the first and second vertical arrangements of nanowires, respectively. First embedded epitaxial source or drain regions are at ends of the first vertical arrangement of nanowires and extend beneath dielectric sidewalls spacers of the first gate stack portion by a first distance. Second embedded epitaxial source or drain regions are at ends of the second vertical arrangement of nanowires and extend beneath the dielectric sidewalls spacers of the second gate stack portion by a second distance substantially the same as the first distance.

公开(公告)号：US20190393351A1

公开(公告)日：2019-12-26

申请号：US16015404

申请日：2018-06-22

申请人： INTEL CORPORATION

发明人： Bruce E. Beattie ,  Leonard Guler ,  Biswajeet Guha ,  Jun Sung Kang ,  William Hsu

IPC分类号： H01L29/78 ,  H01L29/08 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/8234 ,  H01L27/088

摘要： Gate all around semiconductor devices, such as nanowire or nanoribbon devices, are described that include a low dielectric constant (“low-κ”) material disposed between a first nanowire closest to the substrate and the substrate. This configuration enables gate control over all surfaces of the nanowires in a channel region of a semiconductor device via the high-k dielectric material, while also preventing leakage current from the first nanowire into the substrate.

公开(公告)号：US20180358436A1

公开(公告)日：2018-12-13

申请号：US15778724

申请日：2015-12-24

申请人： Intel Corporation

发明人： Karthik Jambunathan ,  Glenn Glass ,  Anand Murthy ,  Jun Sung Kang ,  Seiyon Kim

IPC分类号： H01L29/06 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78

CPC分类号： H01L29/0673 ,  B82Y10/00 ,  H01L29/06 ,  H01L29/0847 ,  H01L29/41725 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78 ,  H01L29/78696

摘要： Methods of forming self-aligned nanowire spacer structures are described. An embodiment includes forming a channel structure comprising a first nanowire and a second nanowire. Source/drain structures are formed adjacent the channel structure, wherein a liner material is disposed on at least a portion of the sidewalls of the source/drain structures. A nanowire spacer structure is formed between the first and second nanowires, wherein the nanowire spacer comprises an oxidized portion of the liner.

公开(公告)号：US11869973B2

公开(公告)日：2024-01-09

申请号：US16013329

申请日：2018-06-20

申请人： INTEL CORPORATION

发明人： Erica J. Thompson ,  Aditya Kasukurti ,  Jun Sung Kang ,  Kai Loon Cheong ,  Biswajeet Guha ,  William Hsu ,  Bruce Beattie

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/10 ,  H01L29/66 ,  H01L21/02 ,  H01L21/311 ,  H01L29/165 ,  H01L29/205 ,  H01L29/423

CPC分类号： H01L29/7853 ,  H01L29/0673 ,  H01L29/1037 ,  H01L29/1054 ,  H01L29/6653 ,  H01L29/6681 ,  H01L29/66818 ,  H01L29/7855 ,  H01L21/02238 ,  H01L21/02241 ,  H01L21/31111 ,  H01L21/31122 ,  H01L29/165 ,  H01L29/205 ,  H01L29/42392

摘要： A nanowire device includes one or more nanowire having a first end portion, a second end portion, and a body portion between the first end portion and the second end portion. A first conductive structure is in contact with the first end portion and a second conductive structure is in contact with the second end portion. The body portion of the nanowire has a first cross-sectional shape and the first end portion has a second cross-sectional shape different from the first cross-sectional shape. Integrated circuits including the nanowire device and a method of cleaning a semiconductor structure are also disclosed.