公开(公告)号：US20220066931A1

公开(公告)日：2022-03-03

申请号：US17310540

申请日：2020-03-14

Applicant: INTEL CORPORATION

Inventor： JOYDEEP RAY ,  NIRANJAN COORAY ,  SUBRAMANIAM MAIYURAN ,  ALTUG KOKER ,  PRASOONKUMAR SURTI ,  VARGHESE GEORGE ,  VALENTIN ANDREI ,  ABHISHEK APPU ,  GUADALUPE GARCIA ,  PATTABHIRAMAN K ,  SUNGYE KIM ,  SANJAY KUMAR ,  PRATIK MAROLIA ,  ELMOUSTAPHA OULD-AHMED-VALL ,  VASANTH RANGANATHAN ,  WILLIAM SADLER ,  LAKSHMINARAYANAN STRIRAMASSARMA

IPC: G06F12/0802

Abstract: Embodiments described herein provide techniques to enable the dynamic reconfiguration of memory on a general-purpose graphics processing unit. One embodiment described herein enables dynamic reconfiguration of cache memory bank assignments based on hardware statistics. One embodiment enables for virtual memory address translation using mixed four kilobyte and sixty-four kilobyte pages within the same page table hierarchy and under the same page directory. One embodiment provides for a graphics processor and associated heterogenous processing system having near and far regions of the same level of a cache hierarchy.