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公开(公告)号：US10986044B2
公开(公告)日：2021-04-20
申请号：US16145637
申请日：2018-09-28
Applicant: INTEL CORPORATION
Inventor： Eugene Yasman , Liron Ain-Kedem
IPC: G06F15/16 , H04L12/879 , G06F9/50 , H04L12/26 , H04L29/06 , H04L12/861 , H04W84/18
Abstract: In some examples, a computing device for processing data streams includes storage to store instructions and a processor to execute the instructions. The processor is to execute the instructions to receive respective data streams provided from a plurality of data producer sensors. The processor is also to execute the instructions to stagger a time of triggering of a first of the plurality of data producer sensors relative to a time of triggering of a second of the plurality of data producer sensors to minimize a concurrency of data frames of the data stream received from the first data producer sensor and data frames of the data stream received from the second of the plurality of data producer sensors. The processor is also to execute the instructions to process the data streams from the plurality of data producer sensors in a time-shared manner. The processor is also to execute the instructions to provide the processed data streams to one or more consumer of the processed data streams.
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2.发明申请公开(公告)号：US20180359410A1
公开(公告)日：2018-12-13
申请号：US15617449
申请日：2017-06-08
Applicant: INTEL CORPORATION
Inventor： Liron Ain-Kedem , Jarno Nikkanen
CPC classification number: H04N5/23216 , H04N5/23212 , H04N5/2353 , H04N5/3532 , H04N9/735
Abstract: A method, system, and article is directed to camera control and image processing with a multi-frame-based window for image data statistics.
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公开(公告)号：US10915258B2
公开(公告)日：2021-02-09
申请号：US15857158
申请日：2017-12-28
Applicant: Intel Corporation
Inventor： Eugene Yasman , Liron Ain-Kedem , Nir Gerber
Abstract: Systems and techniques for bi-directional negotiation for dynamic data chunking are described herein. A set of available features for a memory subsystem. The set of available features including latency of buffer locations of the memory subsystem. An indication of a first latency requirement of a first data consumer and a second latency requirement of a second data consumer may be obtained. A first buffer location of the memory subsystem for a data stream based on the first latency requirement may be negotiated with the first data consumer. A second buffer location of the memory subsystem for the data stream based on the second latency requirement may be negotiated with the second data consumer. An indication of the first buffer location may be provided to the first data consumer and an indication of the second buffer location may be provided to the second data consumer.
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公开(公告)号：US20190042123A1
公开(公告)日：2019-02-07
申请号：US15857158
申请日：2017-12-28
Applicant: Intel Corporation
Inventor： Eugene Yasman , Liron Ain-Kedem , Nir Gerber
IPC: G06F3/06
Abstract: Systems and techniques for bi-directional negotiation for dynamic data chunking are described herein. A set of available features for a memory subsystem. The set of available features including latency of buffer locations of the memory subsystem. An indication of a first latency requirement of a first data consumer and a second latency requirement of a second data consumer may be obtained. A first buffer location of the memory subsystem for a data stream based on the first latency requirement may be negotiated with the first data consumer. A second buffer location of the memory subsystem for the data stream based on the second latency requirement may be negotiated with the second data consumer. An indication of the first buffer location may be provided to the first data consumer and an indication of the second buffer location may be provided to the second data consumer.
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公开(公告)号：US20250112770A1
公开(公告)日：2025-04-03
申请号：US18979047
申请日：2024-12-12
Applicant: Intel Corporation
Inventor： Dan Horovitz , Liron Ain-Kedem , Guy Ben-Artzi
Abstract: Disclosed examples generate an original equipment manufacturer (OEM) private key and an OEM public key; generate an OEM certificate based on the OEM public key; cause sending of the OEM certificate from an OEM product to a silicon provider, the silicon provider to sign the OEM certificate based on a silicon provider private key; and cause storage of the signed OEM certificate in the OEM product.
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Patent Agency Ranking
公开(公告)号：US11513204B2
公开(公告)日：2022-11-29
申请号：US16586431
申请日：2019-09-27
Applicant: Intel Corporation
Inventor： Liron Ain-Kedem , Oren Shalita , Alon Cohen , Yan Kaganovsky
Abstract: Methods, apparatus, systems and articles of manufacture to combine frames of overlapping scanning systems are disclosed. An example apparatus includes a time delay controller to determine a first time value and a second time value, the first time value different from the second time value; a capture synchronizer to, in response to the first time value corresponding to a first time, capture a first frame from a first scanning system and, in response to the second time value corresponding to a second time, capture a second frame from a second scanning system; and a capture combiner to combine the first frame and the second frame into a third frame, the third frame including data from the first frame and data from the second frame.
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公开(公告)号：US11163154B2
公开(公告)日：2021-11-02
申请号：US16673488
申请日：2019-11-04
Applicant: Intel Corporation
Inventor： Liron Ain-Kedem , Arnon Hirshberg
Abstract: Multi-polygon, vertically-separated laser scanning apparatus and methods are disclosed. An example apparatus includes a multi-polygon. The multi-polygon includes a first polygon, a central axis, and a second polygon. The first polygon includes a first plurality of outwardly-facing mirrored facets. The second polygon includes a second plurality of outwardly-facing mirrored facets angularly offset about the central axis relative to the first plurality of outwardly-facing mirrored facets. The second polygon is positioned relative to the first polygon along the central axis. The first and second polygons are rotatable about the central axis.
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公开(公告)号：US20200064623A1
公开(公告)日：2020-02-27
申请号：US16673488
申请日：2019-11-04
Applicant: Intel Corporation
Inventor： Liron Ain-Kedem , Arnon Hirshberg
IPC: G02B26/12
Abstract: Multi-polygon, vertically-separated laser scanning apparatus and methods are disclosed. An example apparatus includes a multi-polygon. The multi-polygon includes a first polygon, a central axis, and a second polygon. The first polygon includes a first plurality of outwardly-facing mirrored facets. The second polygon includes a second plurality of outwardly-facing mirrored facets angularly offset about the central axis relative to the first plurality of outwardly-facing mirrored facets. The second polygon is positioned relative to the first polygon along the central axis. The first and second polygons are rotatable about the central axis.
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公开(公告)号：US20190044891A1
公开(公告)日：2019-02-07
申请号：US16145637
申请日：2018-09-28
Applicant: INTEL CORPORATION
Inventor： Eugene Yasman , Liron Ain-Kedem
IPC: H04L12/879 , H04L12/861 , H04L12/26 , H04L29/06 , G06F9/50
Abstract: In some examples, a computing device for processing data streams includes storage to store instructions and a processor to execute the instructions. The processor is to execute the instructions to receive respective data streams provided from a plurality of data producer sensors. The processor is also to execute the instructions to stagger a time of triggering of a first of the plurality of data producer sensors relative to a time of triggering of a second of the plurality of data producer sensors to minimize a concurrency of data frames of the data stream received from the first data producer sensor and data frames of the data stream received from the second of the plurality of data producer sensors. The processor is also to execute the instructions to process the data streams from the plurality of data producer sensors in a time-shared manner. The processor is also to execute the instructions to provide the processed data streams to one or more consumer of the processed data streams.
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10.发明公开公开(公告)号：US20230153616A1
公开(公告)日：2023-05-18
申请号：US18148057
申请日：2022-12-19
Applicant: Intel Corporation
Inventor： Liron Ain-Kedem , Guy Berger , Maya Rotbart , Guy Zvi Ben Artzi
Abstract: Systems, apparatuses and methods may provide for technology that chains a plurality of convolution operations together, wherein the plurality of convolution operations include one or more one-dimensional (1D) convolution operations and one or more two-dimensional (2D) convolution operations, streams the plurality of convolution operations to shared multiply-accumulate (MAC) hardware, wherein to stream the plurality of convolution operations to the shared MAC hardware, the technology swaps weight inputs to the shared MAC hardware with activation inputs to the shared MAC hardware based on convolution type, and stores output data associated with the plurality of convolution operations to a local memory. Each of the 2D convolution operations may include a multi-cycle multiplication operation.
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