公开(公告)号：US20210013188A1

公开(公告)日：2021-01-14

申请号：US16641922

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Wilfred Gomes ,  Sanka Ganesan ,  DOUG INGERLY ,  ROBERT SANKMAN ,  MARK BOHR ,  DEBENDRA MALLIK

IPC: H01L25/10 ,  H01L25/065 ,  H01L25/00

Abstract: Systems and methods for providing a low profile stacked die semiconductor package in which a first semiconductor package is stacked with a second semiconductor package and both semiconductor packages are conductively coupled to an active silicon substrate that communicably couples the first semiconductor package to the second semiconductor package. The first semiconductor package may conductively couple to the active silicon substrate using a plurality of interconnects disposed in a first interconnect pattern having a first interconnect pitch. The second semiconductor package may conductively couple to the active silicon substrate using a plurality of interconnects disposed in a second interconnect pattern having a second pitch that is greater than the first pitch. The second semiconductor package may be stacked on the first semiconductor package and conductively coupled to the active silicon substrate using a plurality of conductive members or a plurality of wirebonds.

公开(公告)号：US20170263721A1

公开(公告)日：2017-09-14

申请号：US15607982

申请日：2017-05-30

Applicant: INTEL CORPORATION

Inventor： KELIN J. KUHN ,  KAIZAD MISTRY ,  MARK BOHR ,  CHRIS AUTH

IPC: H01L29/417 ,  H01L21/768 ,  H01L29/66 ,  H01L29/45 ,  H01L29/78

CPC classification number: H01L29/41725 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76874 ,  H01L23/485 ,  H01L23/5226 ,  H01L29/456 ,  H01L29/66477 ,  H01L29/78 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Methods of fabricating a first contact to a semiconductor device, which fundamentally comprises providing a semiconductor device formed on a substrate. The substrate further includes a conductive surface. A dielectric layer is formed over the substrate and has an opening exposing the conductive surface. The opening extends an entire length of the semiconductor device, partway down the entire length of the device, extending from the device onto adjacent field of the device, or and a combination thereof. A barrier layer is formed within the opening. A copper containing material fills the opening to form a first contact to the semiconductor device.