公开(公告)号：US20230359496A1

公开(公告)日：2023-11-09

申请号：US17589689

申请日：2022-01-31

Applicant: Intel Corporation

Inventor： PAWEL MAJEWSKI ,  PRASOONKUMAR SURTI ,  KARTHIK VAIDYANATHAN ,  JOSHUA BARCZAK ,  VASANTH RANGANATHAN ,  VIKRANTH VEMULAPALLI

IPC: G06F9/50 ,  G06F9/48 ,  G06F9/54

CPC classification number: G06F9/5027 ,  G06F9/4881 ,  G06F9/54

Abstract: Apparatus and method for stack access throttling for synchronous ray tracing. For example, one embodiment of an apparatus comprises: ray tracing acceleration hardware to manage active ray tracing stack allocations to ensure that a size of the active ray tracing stack allocations remains within a threshold; and an execution unit to execute a thread to explicitly request a new ray tracing stack allocation from the ray tracing acceleration hardware, the ray tracing acceleration hardware to permit the new ray tracing stack allocation if the size of the active ray tracing stack allocations will remain within the threshold after permitting the new ray tracing stack allocation.

公开(公告)号：US20230297415A1

公开(公告)日：2023-09-21

申请号：US17699058

申请日：2022-03-18

Applicant: INTEL CORPORATION

Inventor： PAWEL MAJEWSKI ,  PRASOONKUMAR SURTI ,  TOBIAS ZIRR

IPC: G06F9/48 ,  G06T1/20 ,  G06F9/30

CPC classification number: G06F9/4843 ,  G06T1/20 ,  G06F9/30189

Abstract: Apparatus and method for scheduling inference tasks. For example, one embodiment of an apparatus comprises: a plurality of compute units (CUs) to execute inferencing routines, an inferencing routine comprising a plurality of phases, at least one CU comprising execution circuitry configurable to operate in a single instruction multiple data (SIMD) mode or a single instruction multiple thread (SIMT) mode; and dispatching hardware logic to determine whether a current phase of an inferencing routine is to be executed in the SIMD mode or the SIMT mode, and to dispatch instructions of the current phase for execution by the execution circuitry of a CU in accordance with the SIMD mode or the SIMT mode, respectively.

公开(公告)号：US20200043218A1

公开(公告)日：2020-02-06

申请号：US16056222

申请日：2018-08-06

Applicant: Intel Corporation

Inventor： KARTHIK VAIDYANATHAN ,  WON-JONG LEE ,  GABOR LIKTOR ,  JOHN G. GIERACH ,  PAWEL MAJEWSKI ,  PRASOONKUMAR SURTI ,  CARSTEN BENTHIN ,  Sven WOOP ,  THOMAS RAOUX

IPC: G06T15/00 ,  G06T15/06 ,  G06T15/80

Abstract: Apparatus and method for programmable ray tracing with hardware acceleration on a graphics processor. For example, one embodiment of a graphics processor comprises shader execution circuitry to execute a plurality of programmable ray tracing shaders. The shader execution circuitry includes a plurality of single instruction multiple data (SIMD) execution units. Sorting circuitry regroups data associated with one or more of the programmable ray tracing shaders to increase occupancy for SIMD operations performed by the SIMD execution units; and fixed-function intersection circuitry coupled to the shader execution circuitry detects intersections between rays and bounding volume hierarchies (BVHs) and/or objects contained therein and to provide results indicating the intersections to the sorting circuitry.