公开(公告)号：US09564245B2

公开(公告)日：2017-02-07

申请号：US14141239

申请日：2013-12-26

Applicant: INTEL CORPORATION

Inventor： Bruce Querbach ,  Theodore Z. Schoenborn ,  David J. Zimmerman ,  David G. Ellis ,  Christopher W. Hampson ,  Ifar Wan ,  Yulan Zhang ,  Ramakrishna Mallela ,  William K. Lui

IPC: G06F11/263 ,  G06F11/27 ,  G11C11/406 ,  G11C29/00 ,  G11C29/36 ,  G11C29/44 ,  G11C29/10

CPC classification number: G11C29/36 ,  G06F11/263 ,  G06F11/27 ,  G11C11/406 ,  G11C29/10 ,  G11C29/4401 ,  G11C29/72 ,  G11C29/78 ,  G11C2029/4402

Abstract: In accordance with the present description, a device includes an internal defect detection and repair circuit which includes a self-test logic circuit built in within the device and a self-repair logic circuit also built in within the device. In one embodiment, the built in self-test logic circuit may be configured to automatically identify defective memory cells in a memory. Upon identifying one or more defective memory cells, the built in self-repair logic circuit may be configured to automatically repair the defective memory cells by replacing defective cells with spare cells within the memory.