公开(公告)号：US20250112218A1

公开(公告)日：2025-04-03

申请号：US18478831

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Brandon M. Rawlings ,  Adel Elsherbini ,  Thomas L. Sounart ,  Feras Eid ,  Tushar Kanti Talukdar ,  Kimin Jun ,  Johanna Swan ,  Richard F. Vreeland

IPC: H01L25/00 ,  H01L21/683 ,  H01L25/075

Abstract: In one embodiment, a selective layer transfer process includes forming a layer of integrated circuit (IC) components on a first substrate, forming first bonding structures on a second substrate, and partially bonding the first substrate to the second substrate, which includes bonding a first subset of IC components on the first substrate to respective bonding structures on the second substrate. The process also includes forming second bonding structures on a third substrate, where the second bonding structures are arranged in a layout that is offset from the layout of the second substrate. The process further includes partially bonding the first substrate to the third substrate, which includes bonding a second subset of IC components on the first substrate to respective bonding structures on the third substrate.

公开(公告)号：US20250112188A1

公开(公告)日：2025-04-03

申请号：US18478923

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Georgios C. Dogiamis ,  Qiang Yu ,  Adel Elsherbini ,  Tushar Kanti Talukdar ,  Thomas L. Sounart

IPC: H01L23/00 ,  H01L21/683 ,  H01L23/538 ,  H01L25/00 ,  H01L25/18

Abstract: Methods of selectively transferring integrated circuit (IC) components between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a release layer and a layer of IC components over the release layer is received, and a second substrate with one or more adhesive areas is received. The layer of IC components may include one or more antennas, interconnects, inductors, capacitors, or transformers. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.

公开(公告)号：US20250112204A1

公开(公告)日：2025-04-03

申请号：US18478855

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Julien Sebot ,  Johanna Swan ,  Shawna M. Liff ,  Carleton L. Molnar ,  Tushar Kanti Talukdar

IPC: H01L25/065 ,  G06F12/0811 ,  G06F12/0897 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H10B80/00

Abstract: An embodiment discloses a processor comprising a first die comprising at least one of a processing core or a field programmable gate array, a second die comprising at least a portion of an L1 cache, an L2 cache, or both an L1 cache and an L2 cache, and wherein the first die or the second die is bonded to an adhesive area.

公开(公告)号：US20250112145A1

公开(公告)日：2025-04-03

申请号：US18478529

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Aleksandar Aleksov ,  Tushar Kanti Talukdar

IPC: H01L23/522 ,  H01L21/768 ,  H01L23/532

Abstract: Methods and apparatus are disclosed to improve interconnect structures in integrated circuit packages. An example integrated circuit (IC) package includes a first interconnect structure positioned on a first surface of an underlying substrate; a second interconnect structure positioned on the first surface of the underlying substrate, the second interconnect structure adjacent to the first interconnect structure; and a first dielectric material between the first and second interconnect structures, the first dielectric material including an enclosed trench within a space between the first and second interconnect structures.

公开(公告)号：US20250112077A1

公开(公告)日：2025-04-03

申请号：US18478391

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Feras Eid ,  Andrey Vyatskikh ,  Adel Elsherbini ,  Brandon M. Rawlings ,  Tushar Kanti Talukdar ,  Thomas L. Sounart ,  Kimin Jun ,  Johanna Swan ,  Grant M. Kloster ,  Carlos Bedoya Arroyave

IPC: H01L21/683 ,  H01L23/00 ,  H01L23/538

Abstract: An embodiment discloses an electronic device comprising an integrated circuit (IC) die, a stub extending from the IC die; and a mesa structure under the IC die, wherein the IC die and the stub are bonded to the mesa structure.

公开(公告)号：US20250112210A1

公开(公告)日：2025-04-03

申请号：US18478932

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Han Wui Then ,  Adel Elsherbini ,  Feras Eid ,  Thomas L. Sounart ,  Georgios C. Dogiamis ,  Tushar Kanti Talukdar

IPC: H01L25/065 ,  H01L21/683 ,  H01L21/8238 ,  H01L23/00

Abstract: Methods of selectively transferring integrated circuit (IC) components between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a release layer and a layer of IC components over the release layer is received, and a second substrate with one or more adhesive areas is received. The layer of IC components may include one or more transistors that contain one or more group III-V materials. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.

公开(公告)号：US20250112208A1

公开(公告)日：2025-04-03

申请号：US18478686

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Thomas L. Sounart ,  Feras Eid ,  Kimin Jun ,  Tushar Kanti Talukdar ,  Andrey Vyatskikh ,  Johanna Swan ,  Shawna M. Liff

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/15

Abstract: Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a microelectronic assembly includes a solid glass layer, a plurality of mesa structures on a surface of the glass layer, and an integrated circuit (IC) component on each respective mesa structure. The mesa structures have similar footprints as the IC components, and may be formed on or integrated with the glass layer.

公开(公告)号：US20250105053A1

公开(公告)日：2025-03-27

申请号：US18473711

申请日：2023-09-25

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Han Wui Then ,  Feras Eid ,  James E. Jaussi ,  Ganesh Balamurugan ,  Thomas L. Sounart ,  Johanna Swan ,  Henning Braunisch ,  Tushar Kanti Talukdar ,  Shawna M. Liff

IPC: H01L21/762 ,  G02B6/30 ,  G02B6/43 ,  H01L21/67 ,  H01L21/683 ,  H01L21/768

Abstract: Methods of selectively transferring integrated circuit (IC) components between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a release layer and a layer of IC components over the release layer is received, and a second substrate with one or more adhesive areas is received. The layer of IC components may include one or more waveguides, ring resonators, drivers, photodetectors, transimpedance amplifiers, and/or electronic integrated circuits. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.

公开(公告)号：US20250105046A1

公开(公告)日：2025-03-27

申请号：US18473905

申请日：2023-09-25

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Thomas L. Sounart ,  Feras Eid ,  Tushar Kanti Talukdar ,  Brandon M. Rawlings ,  Andrey Vyatskikh ,  Carlos Bedoya Arroyave ,  Kimin Jun ,  Shawna M. Liff ,  Grant M. Kloster ,  Richard F. Vreeland ,  William P. Brezinski ,  Johanna Swan

IPC: H01L21/683 ,  H01L23/00 ,  H01L25/065

Abstract: Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a layer of integrated circuit (IC) components is received, and a second substrate with one or more adhesive areas is received. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.

公开(公告)号：US20250105025A1

公开(公告)日：2025-03-27

申请号：US18474043

申请日：2023-09-25

Applicant: Intel Corporation

Inventor： Thomas L. Sounart ,  Adel Elsherbini ,  Feras Eid ,  Tushar Kanti Talukdar

IPC: H01L21/50 ,  H01L21/78 ,  H01L23/00

Abstract: Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a release layer and a layer of integrated circuit (IC) components over the release layer is received, and a second substrate with one or more adhesive areas is received. The release layer on the first substrate is weakened. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.