公开(公告)号：US20250112122A1

公开(公告)日：2025-04-03

申请号：US18477906

申请日：2023-09-29

Applicant: INTEL CORPORATION

Inventor： Kevin P. O'Brien ,  Paul Gutwin ,  David L. Kencke ,  Mahmut Sami Kavrik ,  Daniel Chanemougame ,  Ashish Verma Penumatcha ,  Carl Hugo Naylor ,  Kirby Maxey ,  Uygar E. Avci ,  Tristan A. Tronic ,  Chelsey Dorow ,  Andrey Vyatskikh ,  Rachel A. Steinhardt ,  Chia-Ching Lin ,  Chi-Yin Cheng ,  Yu-Jin Chen ,  Tyrone Wilson

IPC: H01L23/48 ,  H01L23/528 ,  H01L27/092 ,  H01L29/06 ,  H01L29/18 ,  H01L29/423 ,  H01L29/78

Abstract: Integrated circuit (IC) devices and systems with backside power gates, and methods of forming the same, are disclosed herein. In one embodiment, an integrated circuit die includes a device layer with one or more transistors, a first interconnect over the device layer, a second interconnect under the device layer, and one or more power gates under the device layer.

公开(公告)号：US20250107147A1

公开(公告)日：2025-03-27

申请号：US18476248

申请日：2023-09-27

Applicant: Intel Corporation

Inventor： Mahmut Sami Kavrik ,  Uygar E. Avci ,  Pratyush P. Buragohain ,  Chelsey Dorow ,  Jack T. Kavalieros ,  Chia-Ching Lin ,  Matthew V. Metz ,  Wouter Mortelmans ,  Carl Hugo Naylor ,  Kevin P. O'Brien ,  Ashish Verma Penumatcha ,  Carly Rogan ,  Rachel A. Steinhardt ,  Tristan A. Tronic ,  Andrey Vyatskikh

IPC: H01L29/786 ,  H01L21/02 ,  H01L21/46 ,  H01L27/092 ,  H01L29/24 ,  H01L29/51 ,  H01L29/66 ,  H01L29/76

Abstract: Hybrid bonding interconnect (HBI) architectures for scalability. Embodiments implement a bonding layer on a semiconductor die that includes a thick oxide layer overlaid with a thin layer of a hermetic material including silicon and at least one of carbon and nitrogen. The conductive bonds of the semiconductor die are placed in the thick oxide layer and exposed at the surface of the hermetic material. Some embodiments implement a non-bonding moisture seal ring (MSR) structure.

公开(公告)号：US20250113573A1

公开(公告)日：2025-04-03

申请号：US18478691

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Andrey Vyatskikh ,  Paul B. Fischer ,  Uygar E. Avci ,  Chelsey Dorow ,  Mahmut Sami Kavrik ,  Karthik Krishnaswamy ,  Chia-Ching Lin ,  Jennifer Lux ,  Kirby Maxey ,  Carl Hugo Naylor ,  Kevin P. O'Brien ,  Justin R. Weber

IPC: H01L29/18 ,  H01L21/02 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/778 ,  H01L29/78

Abstract: A low strain transfer protective layer is formed on a transition metal dichalcogenide (TMD) monolayer to enable the transfer of the TMD monolayer from a growth substrate to a target substrate with little or no strain-induced damage to the TMD monolayer. Transfer of a TMD monolayer from a growth substrate to a target substrate comprises two transfers, a first transfer from the growth substrate to a carrier wafer and a second transfer from the carrier wafer to the target substrate. Transfer of the TMD monolayer from the growth substrate to the carrier wafer comprises mechanically lifting off the TMD monolayer from the growth substrate. The low strain transfer protective layer can limit the amount of strain transferred from the carrier wafer to the TMD monolayer during lift-off. The carrier wafer and protective layer are separated from the TMD monolayer after attachment of the TMD monolayer to the target substrate.

公开(公告)号：US20250112208A1

公开(公告)日：2025-04-03

申请号：US18478686

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Thomas L. Sounart ,  Feras Eid ,  Kimin Jun ,  Tushar Kanti Talukdar ,  Andrey Vyatskikh ,  Johanna Swan ,  Shawna M. Liff

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/15

Abstract: Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a microelectronic assembly includes a solid glass layer, a plurality of mesa structures on a surface of the glass layer, and an integrated circuit (IC) component on each respective mesa structure. The mesa structures have similar footprints as the IC components, and may be formed on or integrated with the glass layer.

公开(公告)号：US20250105046A1

公开(公告)日：2025-03-27

申请号：US18473905

申请日：2023-09-25

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Thomas L. Sounart ,  Feras Eid ,  Tushar Kanti Talukdar ,  Brandon M. Rawlings ,  Andrey Vyatskikh ,  Carlos Bedoya Arroyave ,  Kimin Jun ,  Shawna M. Liff ,  Grant M. Kloster ,  Richard F. Vreeland ,  William P. Brezinski ,  Johanna Swan

IPC: H01L21/683 ,  H01L23/00 ,  H01L25/065

Abstract: Methods of selectively transferring portions of layers between substrates, and devices and systems formed using the same, are disclosed herein. In one embodiment, a first substrate with a layer of integrated circuit (IC) components is received, and a second substrate with one or more adhesive areas is received. The first substrate is partially bonded to the second substrate, such that a subset of IC components on the first substrate are bonded to the adhesive areas on the second substrate. The first substrate is then separated from the second substrate, and the subset of IC components bonded to the second substrate are separated from the first substrate and remain on the second substrate.

公开(公告)号：US20250113520A1

公开(公告)日：2025-04-03

申请号：US18375051

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Andrey Vyatskikh ,  Paul Fischer ,  Paul Nordeen ,  Kevin O'Brien ,  Chelsey Dorow ,  Carl H. Naylor ,  Uygar Avci

IPC: H01L29/775 ,  H01L21/762

Abstract: Techniques and mechanisms for a transition metal dichalcogenide (TMD) material to be grown on one structure, and then transferred to a different structure. In an embodiment, one or more monolayers of a TMD material are grown on a workpiece comprising a substrate, a growth layer, and a release layer. A material of the substrate is transparent to a wavelength of a laser light, wherein the release layer is opaque to said wavelength. The resulting material stack is then coupled to a target structure, after which a laser ablation is performed to remove some or all of the release layer from between the substrate and the growth layer. The ablation enables the substrate to be separated from the one or more monolayers. In an embodiment, a residue on a surface of the one or more TMD monolayers is an artefact of the layer transfer process.

公开(公告)号：US20250112077A1

公开(公告)日：2025-04-03

申请号：US18478391

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Feras Eid ,  Andrey Vyatskikh ,  Adel Elsherbini ,  Brandon M. Rawlings ,  Tushar Kanti Talukdar ,  Thomas L. Sounart ,  Kimin Jun ,  Johanna Swan ,  Grant M. Kloster ,  Carlos Bedoya Arroyave

IPC: H01L21/683 ,  H01L23/00 ,  H01L23/538

Abstract: An embodiment discloses an electronic device comprising an integrated circuit (IC) die, a stub extending from the IC die; and a mesa structure under the IC die, wherein the IC die and the stub are bonded to the mesa structure.

公开(公告)号：US20250113572A1

公开(公告)日：2025-04-03

申请号：US18375060

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Mahmut Sami Kavrik ,  Uygar E. Avci ,  Kevi P. Obrien ,  Chia-Ching Lin ,  Carl H. Naylor ,  Kirby Maxey ,  Andrey Vyatskikh ,  Scott B. Clendenning ,  Matthew Metz ,  Marko Radosavljevic

IPC: H01L29/18 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: Techniques and mechanisms for forming a gate dielectric structure and source or drain (S/D) structures on a monolayer channel structure of a transistor. In an embodiment, the channel structure comprises a two-dimensional (2D) layer of a transition metal dichalcogenide (TMD) material. During fabrication of the transistor structure, a layer of a dielectric material is deposited on the channel structure, wherein the dielectric material is suitable to provide a reaction, with a plasma, to produce a conductive material. While a first portion of the dielectric material is covered by a patterned structure, a second portion of the dielectric material is exposed to a plasma treatment to form a source or dielectric (S/D) electrode structure that adjoins the first portion. In another embodiment, the dielectric material is an oxide of a Group V-VI transition metal.

公开(公告)号：US20250113540A1

公开(公告)日：2025-04-03

申请号：US18375055

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Carl H. Naylor ,  Rachel Steinhardt ,  Mahmut Sami Kavrik ,  Chia-Ching Lin ,  Andrey Vyatskikh ,  Kevin O’Brien ,  Kirby Maxey ,  Ashish Verma Penumatcha ,  Uygar Avci ,  Matthew Metz ,  Chelsey Dorow

IPC: H01L29/49 ,  H01L21/02 ,  H01L29/06 ,  H01L29/24 ,  H01L29/423 ,  H01L29/66 ,  H01L29/76 ,  H01L29/775 ,  H01L29/786

Abstract: Techniques and mechanisms for providing gate dielectric structures of a transistor. In an embodiment, the transistor comprises a thin channel structure which comprises one or more layers of a transition metal dichalcogenide (TMD) material. The channel structure forms two surfaces on opposite respective sides thereof, wherein the surfaces extend to each of two opposing edges of the channel structure. A composite gate dielectric structure comprises first bodies of a first dielectric material, wherein the first bodies each adjoin a different respective one of the two opposing edges, and variously extend to each of the surfaces two surfaces. The composite gate dielectric structure further comprises another body of a second dielectric material other than the first dielectric material. In another embodiment, the other body adjoins one or both of the two surfaces, and extends along one or both of the two surfaces to each of the first bodies.

公开(公告)号：US20250113521A1

公开(公告)日：2025-04-03

申请号：US18478626

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Andrey Vyatskikh ,  Paul B. Fischer ,  Paul Killian Nordeen ,  Uygar E. Avci ,  Mahmut Sami Kavrik ,  Ande Kitamura ,  Kirby Maxey ,  Carl Hugo Naylor ,  Kevin P. O'Brien

IPC: H01L29/775 ,  H01L21/762

Abstract: A transition metal dichalcogenide (TMD) monolayer grown on a growth substrate is directly transferred to a target substrate. Eliminating the use of a carrier wafer in the TMD monolayer transfer process reduces the number of transfers endured by the TMD monolayer from two to one, which can result in less damage to the TMD monolayer. After a TMD monolayer is grown on a growth layer, a protective layer is formed on the TMD monolayer. The protective layer is bonded to the target substrate by a diffusion bonding layer. The direct transfer of TMD monolayers can be repeated to create a stack of TMD monolayers. A stack of TMD monolayers can be used in a field effect transistor, such as a nanoribbon field effect transistor.