公开(公告)号：US20200159670A1

公开(公告)日：2020-05-21

申请号：US16752754

申请日：2020-01-27

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Uwe BRANDT ,  Markus HELMS ,  Christian JACOBI ,  Markus KALTENBACH ,  Thomas KOEHLER ,  Frank LEHNERT

IPC: G06F12/1036 ,  G06F12/1009 ,  G06F9/455

Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels. In operation, based on the first translation engine performing a guest level translation, the second translation engine may perform a host level translation of a resulting guest non-virtual address to a host non-virtual address based on the guest level translation by the first translation engine.

公开(公告)号：US20180260337A1

公开(公告)日：2018-09-13

申请号：US15798585

申请日：2017-10-31

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Uwe BRANDT ,  Markus HELMS ,  Christian JACOBI ,  Markus KALTENBACH ,  Thomas KOEHLER ,  Frank LEHNERT

IPC: G06F12/10

CPC classification number: G06F12/1036 ,  G06F9/45558 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/1016 ,  G06F2212/1056 ,  G06F2212/151 ,  G06F2212/651 ,  G06F2212/657 ,  G06F2212/681 ,  G06F2212/684

Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels. In operation, based on the first translation engine performing a guest level translation, the second translation engine may perform a host level translation of a resulting guest non-virtual address to a host non-virtual address based on the guest level translation by the first translation engine.

公开(公告)号：US20190236024A1

公开(公告)日：2019-08-01

申请号：US16377509

申请日：2019-04-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Uwe BRANDT ,  Markus HELMS ,  Christian JACOBI ,  Markus KALTENBACH ,  Thomas KOEHLER ,  Frank LEHNERT

IPC: G06F12/1036 ,  G06F12/1009

CPC classification number: G06F12/1036 ,  G06F9/45558 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/1016 ,  G06F2212/1056 ,  G06F2212/151 ,  G06F2212/651 ,  G06F2212/657 ,  G06F2212/681 ,  G06F2212/684

Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels. In operation, based on the first translation engine performing a guest level translation, the second translation engine may perform a host level translation of a resulting guest non-virtual address to a host non-virtual address based on the guest level translation by the first translation engine.

公开(公告)号：US20180276138A1

公开(公告)日：2018-09-27

申请号：US15465763

申请日：2017-03-22

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Uwe BRANDT ,  Markus HELMS ,  Christian JACOBI ,  Markus KALTENBACH ,  Thomas KOEHLER ,  Frank LEHNERT

IPC: G06F12/1009 ,  G06F12/0875

Abstract: A translation engine for a processor system to translate virtual memory addresses to physical addresses of a main memory of a computer system is provided, where a sequence of accesses to multiple address translation tables is performed to support a computer system virtualization level. The translation engine includes: a first pipeline having at least, a first pipeline stage to receive a value for an original address or an address translation table entry requested in a previous pass through the first pipeline; a second pipeline stage using the value as an operand in a translation operation eventually yielding the address translation result or yielding a table index to an entry in a next address translation table; and a third pipeline stage issuing a read request for the entry in the next address translation table.

公开(公告)号：US20180260336A1

公开(公告)日：2018-09-13

申请号：US15454243

申请日：2017-03-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Uwe BRANDT ,  Markus HELMS ,  Christian JACOBI ,  Markus KALTENBACH ,  Thomas KOEHLER ,  Frank LEHNERT

IPC: G06F12/1036 ,  G06F12/1009

CPC classification number: G06F12/1036 ,  G06F9/45558 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/1016 ,  G06F2212/1056 ,  G06F2212/151 ,  G06F2212/651 ,  G06F2212/657 ,  G06F2212/681 ,  G06F2212/684

Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels. In operation, based on the first translation engine performing a guest level translation, the second translation engine may perform a host level translation of a resulting guest non-virtual address to a host non-virtual address based on the guest level translation by the first translation engine.

公开(公告)号：US20190236025A1

公开(公告)日：2019-08-01

申请号：US16377556

申请日：2019-04-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Uwe BRANDT ,  Markus HELMS ,  Christian JACOBI ,  Markus KALTENBACH ,  Thomas KOEHLER ,  Frank LEHNERT

IPC: G06F12/1036 ,  G06F12/1009

CPC classification number: G06F12/1036 ,  G06F9/45558 ,  G06F12/1009 ,  G06F2009/45583 ,  G06F2212/1016 ,  G06F2212/1056 ,  G06F2212/151 ,  G06F2212/651 ,  G06F2212/657 ,  G06F2212/681 ,  G06F2212/684

Abstract: An address translation facility is provided for multiple virtualization levels, where a guest virtual address may be translated to a guest non-virtual address, the guest non-virtual address corresponding without translation to a host virtual address, and the host virtual address may be translated to a host non-virtual address, where translation within a virtualization level may be specified as a sequence of accesses to address translation tables. The address translation facility may include a first translation engine and a second translation engine, where the first and second translation engines each have capacity to perform address translation within a single virtualization level of the multiple virtualization levels. In operation, based on the first translation engine performing a guest level translation, the second translation engine may perform a host level translation of a resulting guest non-virtual address to a host non-virtual address based on the guest level translation by the first translation engine.

公开(公告)号：US20190042469A1

公开(公告)日：2019-02-07

申请号：US15815378

申请日：2017-11-16

Applicant: International Business Machines Corporation

Inventor： Dwifuzi COE ,  Christian JACOBI ,  Markus KALTENBACH ,  Eyal NAOR ,  Martin RECKTENWALD

IPC: G06F12/1045 ,  G06F12/0862 ,  G06F12/0811

Abstract: A processor(s) performs a cache access to retrieve data, wherein the cache access by initiating a request that includes an address of a first address type. The cache access includes the processor(s) generating, based on historical data related to the address, a prediction for a location of the data in the cache that is a set identifier of a predicted cache set. The processor(s) concurrently perform a data access to the cache to retrieve sets in the cache. The processor(s) confirm(s) that the retrieved include the predicted cache set. The processor(s) utilize(s) the set identifier to select data from the predicted set.

公开(公告)号：US20190042468A1

公开(公告)日：2019-02-07

申请号：US15669108

申请日：2017-08-04

Applicant: International Business Machines Corporation

Inventor： Dwifuzi COE ,  Christian JACOBI ,  Markus KALTENBACH ,  Eyal NAOR ,  Martin RECKTENWALD

IPC: G06F12/1045 ,  G06F12/0811 ,  G06F12/0862

Abstract: A processor(s) performs a cache access to retrieve data, wherein the cache access by initiating a request that includes an address of a first address type. The cache access includes the processor(s) generating, based on historical data related to the address, a prediction for a location of the data in the cache that is a set identifier of a predicted cache set. The processor(s) concurrently perform a data access to the cache to retrieve sets in the cache. The processor(s) confirm(s) that the retrieved include the predicted cache set. The processor(s) utilize(s) the set identifier to select data from the predicted set.