公开(公告)号：US20230178404A1

公开(公告)日：2023-06-08

申请号：US17541946

申请日：2021-12-03

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Akihiro Horibe ,  Qianwen Chen ,  RISA MIYAZAWA ,  Michael P. Belyansky ,  John Knickerbocker ,  Takashi Hisada

IPC: H01L21/68 ,  H01L21/683

CPC classification number: H01L21/681 ,  H01L21/6835 ,  H01L2221/68381 ,  H01L2221/6834

Abstract: Handler wafers and methods of handling a wafer include positioning a handler, which is attached to a wafer by a bonding layer that comprises a debonding layer, an optical enhancement layer, and an anti-reflection layer. The handler is debonded from the wafer using a laser that emits laser energy at a wavelength that is absorbed by the debonding layer and that is confined to the debonding layer by the optical enhancement layer, such that the material of the debonding layer ablates when exposed to the laser energy to release the wafer.

公开(公告)号：US20230178445A1

公开(公告)日：2023-06-08

申请号：US17543072

申请日：2021-12-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Toyohiro Aoki ,  CHINAMI MARUSHIMA ,  RISA MIYAZAWA ,  Akihiro Horibe ,  Takashi Hisada

IPC: H01L23/31 ,  H01L23/00 ,  H01L21/56 ,  H01L21/67

CPC classification number: H01L23/3157 ,  H01L24/73 ,  H01L21/563 ,  H01L21/67126 ,  H01L2224/73204

Abstract: An electronic device is formed by dispensing an underfill material around a perimeter of an integrated circuit (IC) chip bonded to a supporting substrate. A void in present in the underfill material that is present between the IC chip and the supporting substrate. An opening is present through at least one of the IC chip and the supporting substrate into communication with the void. A vacuum may be applied to the void through the opening that is present through the IC chip to reduce a size of the void to a first volume. The opening that is present through the IC chip is sealed with a sealing plate. The underfill material is cured after the sealing of the opening to reduce of the void to at least a second volume that is less than the first volume.

公开(公告)号：US20240006371A1

公开(公告)日：2024-01-04

申请号：US17809574

申请日：2022-06-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Keiji Matsumoto ,  Toyohiro Aoki ,  Takahito Watanabe ,  RISA MIYAZAWA ,  Takashi Hisada

IPC: H01L23/00

CPC classification number: H01L24/81 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L2224/11849 ,  H01L2224/1148 ,  H01L2224/16237 ,  H01L2224/2902 ,  H01L2224/0401 ,  H01L2224/73204 ,  H01L2224/81815

Abstract: An interconnect system may connect a first semiconductor device with second semiconductor device. The interconnect system includes patterned mask, conductive pads, solder bumps, and an adhesion layer. The patterned mask may be retained after it is utilized to fabricate the conductive pads and the solder bumps. The patterned mask may be thinned, and the adhesion layer may be formed upon the thinned patterned mask and upon the solder bumps. The adhesion layer and the solder bumps may be partially removed or planarized and the top surface of the adhesion layer that remains between the solder bumps may be coplanar with the top surface of the solder bumps.

公开(公告)号：US20220359227A1

公开(公告)日：2022-11-10

申请号：US17308176

申请日：2021-05-05

Applicant: International Business Machines Corporation

Inventor： Takahito Watanabe ,  RISA MIYAZAWA ,  Hiroyuki Mori

IPC: H01L21/48 ,  H01L23/538 ,  H01L23/532

Abstract: Aspects of the present disclosure relate to a method for fabricating an interconnection layer carrying structure. A carrier is provided. An organic layer is deposited on the carrier, wherein the organic layer includes a multi-layer wiring structure therein, and the uppermost surface is covered with an organic top layer. A sacrificial layer is deposited on the organic top layer. The carrier and the organic layer are diced together with the sacrificial layer.