公开(公告)号：US20240036074A1

公开(公告)日：2024-02-01

申请号：US17876652

申请日：2022-07-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： KUSHAGRA SINHA ,  ZHENG XU ,  Yufei Wu ,  Myra Ahmad ,  Nikhilesh C Sahani

IPC: G01R1/067 ,  G01R31/28

CPC classification number: G01R1/06794 ,  G01R31/2891

Abstract: Aspect of the disclosure include a testing apparatus and a method for testing an integrated circuit. One embodiment of the testing apparatus may comprise a main probe pin configured for electrical testing of a sample, the sample having a terminal pad, and a secondary probe pin configured for contact testing of the main probe pin against the terminal pad. In some embodiments, the testing apparatus may further comprise an indicator circuit electrically connected to the main probe pin and the secondary probe pin. The indicator circuit may output a signal when the main probe pin and the secondary probe pin are in simultaneous electrical engagement with the terminal pad.

公开(公告)号：US10831976B1

公开(公告)日：2020-11-10

申请号：US16427321

申请日：2019-05-30

Applicant: International Business Machines Corporation

Inventor： Jing Sha ,  Dongbing Shao ,  Yufei Wu ,  Zheng Xu

IPC: G06F30/398 ,  G06N20/00 ,  G06K9/62 ,  G06N3/04 ,  G06N3/08

Abstract: A method for predicting local layout effect in a circuit design pattern includes obtaining a plurality of circuit design patterns, generating layout images from the circuit design patterns, extracting feature vectors from the layout images by processing the layout images in a computer vision machine learning algorithm, comparing the feature vector extracted from a selected layout image to clusters of feature vectors extracted from the layout images, wherein the clusters of feature vectors include an in-range cluster and an outlier cluster, and labelling a circuit design pattern corresponding to the selected layout image, for which threshold voltage has not been experimentally measured, as being an in-range circuit design pattern or an outlier circuit design pattern, in response to the selected layout image respectively correlating with the in-range cluster or with the outlier cluster.

公开(公告)号：US11150972B1

公开(公告)日：2021-10-19

申请号：US16872418

申请日：2020-05-12

Applicant: International Business Machines Corporation

Inventor： Kennedy Cheruiyot ,  Edward C. McCain ,  Ali Y. Duale ,  Akil Khamisi Sutton ,  Yufei Wu

IPC: G06F11/07 ,  G06F8/65

Abstract: Aspects include monitoring for occurrences of selected events at a computer system, the monitoring by a processor that is coupled to the computer system. A list of event records for each of the selected events is built by the processor. The building of event records includes generating an event record for each occurrence of an event detected by the monitoring. The lists of event records for the selected events are merged into a merged list of event records that are in chronological order. A machine report for the computer system that includes the merged list of event records is stored.

公开(公告)号：US10956690B1

公开(公告)日：2021-03-23

申请号：US16581832

申请日：2019-09-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Akil Khamisi Sutton ,  Edward C. McCain ,  Yufei Wu ,  Kennedy Cheruiyot ,  Ali Y. Duale

IPC: G06K7/10 ,  H04W4/029

Abstract: A management system monitors a set of objects of a user by wirelessly communicating with one or more location components associated with the objects, and each object of the set has a respective location component. The monitoring includes ascertaining by the management system, based at least in part on data obtained via wireless communication with the location component(s), a spatial centroid of the set and a spatial separation of an object in the set from the spatial centroid, and correlating the ascertained spatial centroid to a context classification of multiple context classifications. The management system further determines whether a difference between the ascertained spatial separation and the average spatial separation of the location component(s) for the correlated context classification exceeds an acceptable spatial separation tolerance. Based on the difference exceeding the acceptable tolerance, the management system provides an electronic alert to the user.

公开(公告)号：US20200380088A1

公开(公告)日：2020-12-03

申请号：US16427321

申请日：2019-05-30

Applicant: International Business Machines Corporation

Inventor： Jing Sha ,  Dongbing Shao ,  Yufei Wu ,  Zheng Xu

IPC: G06F17/50 ,  G06N20/00 ,  G06N3/08 ,  G06N3/04 ,  G06K9/62

Abstract: A method for predicting local layout effect in a circuit design pattern includes obtaining a plurality of circuit design patterns, generating layout images from the circuit design patterns, extracting feature vectors from the layout images by processing the layout images in a computer vision machine learning algorithm, comparing the feature vector extracted from a selected layout image to clusters of feature vectors extracted from the layout images, wherein the clusters of feature vectors include an in-range cluster and an outlier cluster, and labelling a circuit design pattern corresponding to the selected layout image, for which threshold voltage has not been experimentally measured, as being an in-range circuit design pattern or an outlier circuit design pattern, in response to the selected layout image respectively correlating with the in-range cluster or with the outlier cluster.

公开(公告)号：US12188961B2

公开(公告)日：2025-01-07

申请号：US17876652

申请日：2022-07-29

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Kushagra Sinha ,  Zheng Xu ,  Yufei Wu ,  Myra Ahmad ,  Nikhilesh C Sahani

IPC: G01R1/067 ,  G01R31/28

Abstract: A testing apparatus and a method for testing an integrated circuit are described. One embodiment of the testing apparatus may comprise a main probe pin configured for electrical testing of a sample, the sample having a terminal pad, and a secondary probe pin configured for contact testing of the main probe pin against the terminal pad. In some embodiments, the testing apparatus may further comprise an indicator circuit electrically connected to the main probe pin and the secondary probe pin. The indicator circuit may output a signal when the main probe pin and the secondary probe pin are in simultaneous electrical engagement with the terminal pad.