公开(公告)号：US20100213541A1

公开(公告)日：2010-08-26

申请号：US12699650

申请日：2010-02-03

申请人： In-sang Jeon ,  Si-hyung Lee ,  Jong-ryeol Yoo ,  Yu-gyun Shin ,  Suk-hun Choi

发明人： In-sang Jeon ,  Si-hyung Lee ,  Jong-ryeol Yoo ,  Yu-gyun Shin ,  Suk-hun Choi

IPC分类号： H01L29/78

CPC分类号： H01L29/4236 ,  H01L21/28088 ,  H01L21/28202 ,  H01L27/10876 ,  H01L27/11 ,  H01L27/11517 ,  H01L29/4966 ,  H01L29/518

摘要： An integrated circuit device includes a semiconductor substrate including an active region defined by an isolation region and having at least one trench therein, a gate insulating layer formed in the at least one trench, a gate electrode layer having a nano-crystalline structure disposed on the gate insulating layer and a word line on the gate electrode layer in the at least one trench. The device may further include a capping layer on the word line.

摘要翻译： 一种集成电路器件包括：半导体衬底，包括由隔离区限定的有源区，其中至少有一个沟槽;在该至少一个沟槽中形成的栅极绝缘层，具有纳米晶体结构的栅电极层， 栅极绝缘层和在至少一个沟槽中的栅极电极层上的字线。 该装置还可以包括字线上的覆盖层。

公开(公告)号：US07723755B2

公开(公告)日：2010-05-25

申请号：US12003973

申请日：2008-01-04

申请人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

发明人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

IPC分类号： H01L27/00

CPC分类号： H01L27/10876 ,  H01L27/10891

摘要： Provided are a semiconductor device having a buried word line structure in which a gate electrode and a word line may be buried within a substrate to reduce the height of the semiconductor device and to reduce the degradation of the oxide layer caused by chlorine ions from the application of a TiN metal gate, and a method of fabricating the semiconductor device. The semiconductor device may comprise a semiconductor substrate defined by a device isolation layer and comprising an active region including a trench and one or more recess channels, a gate isolation layer on the surface of the trench, a gate electrode layer on the surface of the gate isolation layer, and a word line by which the trench may be buried on the surface of the gate electrode layer.

摘要翻译： 提供一种具有掩埋字线结构的半导体器件，其中栅极电极和字线可以被掩埋在衬底内以降低半导体器件的高度并且减少由来自应用的氯离子引起的氧化物层的劣化 的TiN金属栅极，以及制造半导体器件的方法。 半导体器件可以包括由器件隔离层限定的半导体衬底，并且包括有源区，包括沟槽和一个或多个凹陷通道，沟槽表面上的栅极隔离层，栅极表面上的栅极电极层 隔离层以及沟槽可以埋在栅电极层的表面上的字线。

公开(公告)号：US20080211057A1

公开(公告)日：2008-09-04

申请号：US12003973

申请日：2008-01-04

申请人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

发明人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

IPC分类号： H01L29/40

CPC分类号： H01L27/10876 ,  H01L27/10891

摘要： Provided are a semiconductor device having a buried word line structure in which a gate electrode and a word line may be buried within a substrate to reduce the height of the semiconductor device and to reduce the degradation of the oxide layer caused by chlorine ions from the application of a TiN metal gate, and a method of fabricating the semiconductor device. The semiconductor device may comprise a semiconductor substrate defined by a device isolation layer and comprising an active region including a trench and one or more recess channels, a gate isolation layer on the surface of the trench, a gate electrode layer on the surface of the gate isolation layer, and a word line by which the trench may be buried on the surface of the gate electrode layer.

摘要翻译： 提供一种具有掩埋字线结构的半导体器件，其中栅极电极和字线可以被掩埋在衬底内以降低半导体器件的高度并且减少由来自应用的氯离子引起的氧化物层的劣化 的TiN金属栅极，以及制造半导体器件的方法。 半导体器件可以包括由器件隔离层限定的半导体衬底，并且包括有源区，包括沟槽和一个或多个凹陷通道，沟槽表面上的栅极隔离层，栅极表面上的栅极电极层 隔离层以及沟槽可以埋在栅电极层的表面上的字线。