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    Semiconductor having buried word line cell structure and method of fabricating the same
    1.
    发明授权
    Semiconductor having buried word line cell structure and method of fabricating the same 有权
    具有掩埋字线单元结构的半导体及其制造方法

    公开(公告)号：US07723755B2

    公开(公告)日：2010-05-25

    申请号：US12003973

    申请日：2008-01-04

    申请人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

    发明人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

    IPC分类号： H01L27/00

    CPC分类号： H01L27/10876 ,  H01L27/10891

    摘要： Provided are a semiconductor device having a buried word line structure in which a gate electrode and a word line may be buried within a substrate to reduce the height of the semiconductor device and to reduce the degradation of the oxide layer caused by chlorine ions from the application of a TiN metal gate, and a method of fabricating the semiconductor device. The semiconductor device may comprise a semiconductor substrate defined by a device isolation layer and comprising an active region including a trench and one or more recess channels, a gate isolation layer on the surface of the trench, a gate electrode layer on the surface of the gate isolation layer, and a word line by which the trench may be buried on the surface of the gate electrode layer.

    摘要翻译： 提供一种具有掩埋字线结构的半导体器件，其中栅极电极和字线可以被掩埋在衬底内以降低半导体器件的高度并且减少由来自应用的氯离子引起的氧化物层的劣化 的TiN金属栅极，以及制造半导体器件的方法。 半导体器件可以包括由器件隔离层限定的半导体衬底，并且包括有源区，包括沟槽和一个或多个凹陷通道，沟槽表面上的栅极隔离层，栅极表面上的栅极电极层 隔离层以及沟槽可以埋在栅电极层的表面上的字线。

    Semiconductor having buried word line cell structure and method of fabricating the same
    2.
    发明申请
    Semiconductor having buried word line cell structure and method of fabricating the same 有权
    具有掩埋字线单元结构的半导体及其制造方法

    公开(公告)号：US20080211057A1

    公开(公告)日：2008-09-04

    申请号：US12003973

    申请日：2008-01-04

    申请人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

    发明人： Si-hyung Lee ,  Sang-ryol Yang ,  Myoung-bum Lee ,  Ki-hyun Hwang

    IPC分类号： H01L29/40

    CPC分类号： H01L27/10876 ,  H01L27/10891

    摘要： Provided are a semiconductor device having a buried word line structure in which a gate electrode and a word line may be buried within a substrate to reduce the height of the semiconductor device and to reduce the degradation of the oxide layer caused by chlorine ions from the application of a TiN metal gate, and a method of fabricating the semiconductor device. The semiconductor device may comprise a semiconductor substrate defined by a device isolation layer and comprising an active region including a trench and one or more recess channels, a gate isolation layer on the surface of the trench, a gate electrode layer on the surface of the gate isolation layer, and a word line by which the trench may be buried on the surface of the gate electrode layer.

    摘要翻译： 提供一种具有掩埋字线结构的半导体器件，其中栅极电极和字线可以被掩埋在衬底内以降低半导体器件的高度并且减少由来自应用的氯离子引起的氧化物层的劣化 的TiN金属栅极，以及制造半导体器件的方法。 半导体器件可以包括由器件隔离层限定的半导体衬底，并且包括有源区，包括沟槽和一个或多个凹陷通道，沟槽表面上的栅极隔离层，栅极表面上的栅极电极层 隔离层以及沟槽可以埋在栅电极层的表面上的字线。

    Method of forming a mask stack pattern and method of manufacturing a flash memory device including an active area having rounded corners
    10.
    发明申请
    Method of forming a mask stack pattern and method of manufacturing a flash memory device including an active area having rounded corners 审中-公开
    形成掩模堆叠图案的方法和制造包括具有圆角的有效区域的闪存设备的方法

    公开(公告)号：US20090203190A1

    公开(公告)日：2009-08-13

    申请号：US12320435

    申请日：2009-01-26

    申请人： Young-jin Noh ,  Si-young Choi ,  Bon-young Koo ,  Ki-hyun Hwang ,  Chul-sung Kim ,  Sung-kweon Baek ,  Jin-hwa Heo

    发明人： Young-jin Noh ,  Si-young Choi ,  Bon-young Koo ,  Ki-hyun Hwang ,  Chul-sung Kim ,  Sung-kweon Baek ,  Jin-hwa Heo

    IPC分类号： H01L21/762 ,  H01L21/30

    CPC分类号： H01L21/76224

    摘要： A method of forming a mask stack pattern and a method of manufacturing a flash memory device including an active area having rounded corners are provided. The method of manufacture including forming a mask stack pattern defining an active region, the mask stack pattern having a pad oxide layer formed on a semiconductor substrate, a silicon nitride layer formed on the pad oxide layer and a stack oxide layer formed on the silicon nitride layer, oxidizing a surface of the semiconductor substrate exposed by the mask stack pattern and lateral surfaces of the silicon nitride layer such that corners of the active region are rounded, etching the semiconductor substrate having an oxidized surface to form a trench in the semiconductor substrate, forming a device isolation oxide layer in the trench, removing the silicon nitride layer from the semiconductor substrate, and forming a gate electrode in a portion where the silicon nitride layer is removed.

    摘要翻译： 提供一种形成掩模叠层图案的方法和制造包括具有圆角的有效区域的闪速存储器件的方法。 制造方法包括形成限定有源区的掩模叠层图案，掩模叠层图案具有形成在半导体衬底上的焊盘氧化层，形成在焊盘氧化物层上的氮化硅层和形成在氮化硅上的堆叠氧化物层 氧化由掩模堆叠图案和氮化硅层的侧表面暴露的半导体衬底的表面，使得有源区的角部变圆，蚀刻具有氧化表面的半导体衬底，以在半导体衬底中形成沟槽， 在沟槽中形成器件隔离氧化物层，从半导体衬底去除氮化硅层，并在除去氮化硅层的部分中形成栅电极。