公开(公告)号：US20040245618A1

公开(公告)日：2004-12-09

申请号：US10831455

申请日：2004-04-23

申请人： Infineon Technologies AG

发明人： Albrecht Mayer

IPC分类号： H01L021/44 ,  H01H073/00 ,  H01L023/22 ,  H01L029/40

CPC分类号： H01L25/50 ,  G03F1/50 ,  G03F7/70466 ,  H01L25/0655 ,  H01L27/0203 ,  H01L2224/48227 ,  H01L2224/49171 ,  H01L2924/10253 ,  H01L2924/00

摘要： In an integrated circuit having a first circuit part and at least one second circuit part, which is assigned to a specific functionality of the first circuit part, on one and the same silicon wafer, of which the first circuit part and the at least one circuit part are arranged in non-overlapping, mutually separate regions of the silicon wafer and are connected to one another via connecting elements or lines, during the fabrication, for each exposure plane, with the exception of the exposure plane used for the fabrication of the connecting elements or lines, use is made in each case of a first exposure mask intended for the first circuit part and a second exposure mask intended for the second circuit part. These first and second exposure masks may be arranged on a common reticle for a respective exposure plane.

摘要翻译： 在具有分配给第一电路部分的特定功能的第一电路部分和至少一个第二电路部分的集成电路中，在同一个硅晶片上，其中第一电路部分和至少一个电路 部分布置在硅晶片的非重叠，相互分离的区域中，并且在制造期间通过连接元件或线彼此连接，对于每个曝光平面，除了用于制造连接的曝光平面 在第一电路部分的第一曝光掩模和用于第二电路部分的第二曝光掩模的每种情况下都使用元件或线。 这些第一和第二曝光掩模可以布置在相应的曝光平面的公共掩模版上。