公开(公告)号：US20240257893A1

公开(公告)日：2024-08-01

申请号：US18424922

申请日：2024-01-29

Applicant: Infineon Technologies AG

Inventor： Thomas Kern ,  Alexander Klockmann ,  Michael Goessel

IPC: G11C29/42

CPC classification number: G11C29/42

Abstract: Solutions are proposed related to error detection wherein (i) each byte of a second byte sequence is determined as a function of at least one byte of a first byte sequence, (ii) a byte of the second byte sequence is impermissible if it is not equal to an assigned byte of the first byte sequence and if no error of a predefined error set corrupts this byte to the assigned byte of the first byte sequence, and (iii) at least one error is detected if the second byte sequence is impermissible, the second byte sequence being impermissible if at least one byte of the second byte sequence is impermissible.

公开(公告)号：US20230267039A1

公开(公告)日：2023-08-24

申请号：US18159365

申请日：2023-01-25

Applicant: Infineon Technologies AG

Inventor： Thomas Kern ,  Michael Goessel ,  Alexander Klockmann ,  Thomas Rabenalt

IPC: G06F11/10

CPC classification number: G06F11/1068

Abstract: A solution is proposed for error processing, wherein n byte error positions of n byte errors are predefined (where n is a positive integer), wherein this involves determining whether there is a further byte error position on the basis of the n byte error positions and on the basis of n + 1 error syndrome components of a first error code.

公开(公告)号：US12147303B2

公开(公告)日：2024-11-19

申请号：US18159365

申请日：2023-01-25

Applicant: Infineon Technologies AG

Inventor： Thomas Kern ,  Michael Goessel ,  Alexander Klockmann ,  Thomas Rabenalt

IPC: G06F11/10

Abstract: A solution is proposed for error processing, wherein n byte error positions of n byte errors are predefined (where n is a positive integer), wherein this involves determining whether there is a further byte error position on the basis of the n byte error positions and on the basis of n+1 error syndrome components of a first error code.

公开(公告)号：US20220345157A1

公开(公告)日：2022-10-27

申请号：US17719648

申请日：2022-04-13

Applicant: Infineon Technologies AG

Inventor： Thomas Kern ,  Michael Goessel ,  Alexander Klockmann ,  Thomas Rabenalt

IPC: H03M13/15

Abstract: A solution for detecting a multibyte error in a code word of a shortened error code is proposed, the shortened error code is a τ-byte-correcting error code, wherein bytes of the code word of the shortened error code determined a first range, the non-correctable multibyte error is detected if at least one of the following conditions is met: (a) at least one error position signal does not lie in the first range; (b) at least one error position signal indicates at least one error but fewer than terrors in the first range and no 1-byte error to (τ−1)-byte error is present.