公开(公告)号：US09490787B1

公开(公告)日：2016-11-08

申请号：US14737224

申请日：2015-06-11

Applicant: Infineon Technologies AG

Inventor： Rex Kho ,  Andreas Weisgerber ,  Dirk Hesidenz

IPC: H04L7/00 ,  H03K5/135 ,  H03L7/081 ,  H03L7/091 ,  H03K5/00

CPC classification number: H03K5/135 ,  H03K2005/00019

Abstract: An embodiment integrated circuit (IC) clock distributor system includes a first IC. The first IC includes a clock synchronizer circuit and a clock generator circuit. The clock synchronizer circuit includes a first input coupled to a first clock transfer path including a replica delay of a portion of a first signal path included in an external IC. The clock synchronizer circuit also includes a second input coupled to a second clock transfer path. The clock generator circuit also includes an input coupled to an output of at least one of a reference oscillator and the clock synchronizer circuit. Delay of the second clock transfer path includes delay of the first signal path.

Abstract translation: 实施例集成电路（IC）时钟分配器系统包括第一IC。 第一IC包括时钟同步器电路和时钟发生器电路。 时钟同步器电路包括耦合到包括外部IC中包括的第一信号路径的一部分的复制延迟的第一时钟传送路径的第一输入。 时钟同步器电路还包括耦合到第二时钟传送路径的第二输入。 时钟发生器电路还包括耦合到参考振荡器和时钟同步器电路中的至少一个的输出的输入。 第二时钟传送路径的延迟包括第一信号路径的延迟。