公开(公告)号：US09711621B2

公开(公告)日：2017-07-18

申请号：US14446741

申请日：2014-07-30

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H01L21/265 ,  H01L29/06 ,  H01L29/417

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A trench transistor having a semiconductor body includes a source region, a body region, a drain region electrically connected to a drain contact, and a gate trench including a gate electrode which is isolated from the semiconductor body. The gate electrode is configured to control current flow between the source region and the drain region along at least a first side wall of the gate trench. The trench transistor further includes a doped semiconductor region having dopants introduced into the semiconductor body through an unmasked part of the walls of a trench.

公开(公告)号：US08815686B2

公开(公告)日：2014-08-26

申请号：US13803291

申请日：2013-03-14

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L21/336

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench.

Abstract translation: 在横向沟槽晶体管的半导体本体中制造掺杂半导体区域的方法包括：在半导体本体中形成沟槽，并且通过在半导体本体中进行工艺，将掺杂物引入与沟槽相邻的半导体本体的至少一个区域中 所述掺杂剂通过沟槽的内壁进入至少一个区域。

公开(公告)号：US20130224921A1

公开(公告)日：2013-08-29

申请号：US13803291

申请日：2013-03-14

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L29/66

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A method for production of doped semiconductor regions in a semiconductor body of a lateral trench transistor includes forming a trench in the semiconductor body and introducing dopants into at least one area of the semiconductor body that is adjacent to the trench, by carrying out a process in which dopants enter the at least one area through inner walls of the trench.

Abstract translation: 在横向沟槽晶体管的半导体本体中制造掺杂半导体区域的方法包括：在半导体本体中形成沟槽，并且通过在半导体本体中进行工艺，将掺杂物引入与沟槽相邻的半导体本体的至少一个区域中 所述掺杂剂通过沟槽的内壁进入至少一个区域。

公开(公告)号：US20140332885A1

公开(公告)日：2014-11-13

申请号：US14446741

申请日：2014-07-30

Applicant: Infineon Technologies AG

Inventor： Franz Hirler ,  Uwe Wahl ,  Thorsten Meyer ,  Michael Rüb ,  Armin Willmeroth ,  Markus Schmitt ,  Carolin Tolksdorf ,  Carsten Schaeffer

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66689 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/1045 ,  H01L29/1095 ,  H01L29/41758 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/66704 ,  H01L29/78 ,  H01L29/7825

Abstract: A lateral trench transistor has a semiconductor body having a source region, a source contact, a body region, a drain region, and a gate trench, in which a gate electrode which is isolated from the semiconductor body is embedded. A heavily doped semiconductor region is provided within the body region or adjacent to it, and is electrically connected to the source contact, and whose dopant type corresponds to that of the body region.

Abstract translation: 横向沟槽晶体管具有半导体本体，其具有嵌入与半导体本体隔离的栅电极的源极区，源极接触，体区，漏极区和栅极沟槽。 重掺杂半导体区域设置在体区内或与其相邻，并且与源极接触电连接，并且其掺杂剂类型对应于身体区域。